公开(公告)号：JPH04251339A

公开(公告)日：1992-09-07

申请号：JP5238591

申请日：1991-03-18

Applicant: IBM

Inventor： AHARON AHARON ,  AYARU BAA DABUIDO ,  RAANAN GEUIRUTSUMAN ,  EMANIYUERU GOFUMAN ,  MOSHII REIBOUITSUTSU ,  BUIKUTAA SHIYUWARUTSUBAADO

IPC: G06F11/22 ,  G01R31/317 ,  G01R31/3183 ,  G06F11/30 ,  G06F17/50 ,  H03K3/84

Abstract: PURPOSE: To provide a dynamic method for generating a biased pseudo random test pattern, where the defect of a conventional still point method is conquested and which is for inspecting the function of an integrated circuit design. CONSTITUTION: Inspection is executed in a series of steps and respective test patterns provide whole data required for testing at least one of the inter-step circuit design of the steps. The respective steps are generated in two stages. In the first stage 1-13, the whole devices and parameters required for executing the respective steps are stipulated. In the second stage 14, the specified step is stipulated. The process is continued till the test pattern providing the number of the steps requested by a user is generated and also the test pattern is constituted by three parts finally. The initialized device stipulates an initial machine state and a test pattern execution part and the test pattern result part is generated by the value of the device which is changed during the execution of the respective steps.