公开(公告)号：GB2495590A

公开(公告)日：2013-04-17

申请号：GB201216404

申请日：2012-09-14

Applicant: IBM

Inventor： CONDORELLI VINCENZO ,  FERNANDEZ WILLIAM SANTIAGO ,  VISEGRADY TAMAS ,  DRAGONE SILVIO

IPC: G06F9/445 ,  G06F21/57

Abstract: A data processor has a main system and a subsystem. The main system has a processor and memory. It may also have two or more programmable hardware devices. The subsystem has a processor and a memory. The main processor executes code images stored in the subsystem memory by copying the active copy of the code image into the processor memory. An active programmable hardware device is programmed using an active copy of a code image from the subsystem memory. When an updated copy of a code image is received by the data processor, the subsystem processor carries out a security and reliability check. It then writes the image into the subsystem memory and marks it as an active copy. The main processor copies the code to the main memory and executes the code. Alternatively, the main processor programs an inactive hardware device with the code and marks it active.