1.
    发明专利
    未知

    公开(公告)号:DE68928381T2

    公开(公告)日:1998-03-26

    申请号:DE68928381

    申请日:1989-07-14

    Applicant: IBM

    Abstract: The present invention relates to apparatus for transmitting data between a central processor (12) and one or more remote peripheral devices (30, 32, 34) comprising one or more channels (14) connected between the processor and one or more peripheral device controllers (24, 26, 28) for controlling one or more peripheral devices (30, 32, 34) in response to signals from the channel in accordance with a predetermined communications protocol, and a serial data link adapter (17) connected between one of the channels and one or more of the peripheral device controllers for extending the range of communications between the channels and the controllers. According to the invention, the apparatus is characterised in that the serial data link adapter (17) comprises first and second sub-adapters (16, 20) each communicating with the other across the serial data link and each sub-adapter having transmit and receive sections, in that the transmit section of each of the sub-adapters comprises frame generation means (40A, 40B) responsive to signals received from the channel (14) and the peripheral device controllers respectively, the signals conforming to the predetermined protocol, the frame generation means including means for generating one or more unique start frame characters in response to control signals received by the frame generation means, means for generating predetermined idle characters, the idle characters having an error imune relationship with the start frame characters, such that idle characters having single and double bit errors transmitted on the serial data link will not be recognized as start frame characters, an encoder (50A, 50B) for encoding data for efficient and error free transmission over the data link, a serializer (60A, 60B) for converting the encoded data from parallel format to serial format, and link interface and driver means (110A, 110B) for transmitting serialized encoded data into the serial data link and in that the receive section of each of the sub-adapters comprises a receiver (80A, 80B) for receiving the encoded serialized data, a deserializer (90A, 90B) for converting the serial encoded data to parallel format, a decoder (100A, 100B) for recovering digital data in an error free form, and interface means (110A, 110B) for reconstructing data and control signals in the predetermined protocol for transmission to the one or more peripheral device controllers or to the channel.

    2.
    发明专利
    未知

    公开(公告)号:DE3678309D1

    公开(公告)日:1991-05-02

    申请号:DE3678309

    申请日:1986-01-24

    Applicant: IBM

    Abstract: @ Data is transferred between a channel (42) and a control unit (13) in interlocked mode or in data streaming mode over a conventional parallel bus and a serial link that permits the control unit and the channel to be located farther apart than the length of the parallel bus. The serial link carries frames - (30) for the rise of the data transfer tags but not their fall, and these tags on the parallel bus are dropped by two circuits that connect the serial link to the parallel bus. In data streaming mode, one data transfer tag is dropped when the next data transfer tag is received on the serial link. The circuit at the control unit end of the serial link detects a pause in the tags to begin an operation to drop the last data transfer tags and both circuits respond to other conditions to drop the last data transfer tags according to the protocol of the parallel 'bus.

    3.
    发明专利
    未知

    公开(公告)号:DE69228904T2

    公开(公告)日:1999-11-25

    申请号:DE69228904

    申请日:1992-06-16

    Applicant: IBM

    Abstract: A method for acquiring the node identifier of a node in a data processing input/output (I/O) system having a plurality of nodes. This procedure is part of the initialization of each node in the I/O system and may be used to establish the configuration of the I/O system such that if a connection breaks or a fault occurs between nodes, the configuration can be confirmed after the break or fault is corrected. This prevents data from being sent to the wrong device if lines were connected in a different configuration during the correction of a fault. The node identifier is a worldwide-unique identifier such that only one node is identified by a node identifier. The node identifier contains a validity code that specifies if the node identifier is valid. Also disclosed is a retry procedure for retrying the acquisition of a node identifier if the acquired node identifier is not valid, and a deferral procedure which defers the retry procedure if a link is not available.

    4.
    发明专利
    未知

    公开(公告)号:DE69228904D1

    公开(公告)日:1999-05-20

    申请号:DE69228904

    申请日:1992-06-16

    Applicant: IBM

    Abstract: A method for acquiring the node identifier of a node in a data processing input/output (I/O) system having a plurality of nodes. This procedure is part of the initialization of each node in the I/O system and may be used to establish the configuration of the I/O system such that if a connection breaks or a fault occurs between nodes, the configuration can be confirmed after the break or fault is corrected. This prevents data from being sent to the wrong device if lines were connected in a different configuration during the correction of a fault. The node identifier is a worldwide-unique identifier such that only one node is identified by a node identifier. The node identifier contains a validity code that specifies if the node identifier is valid. Also disclosed is a retry procedure for retrying the acquisition of a node identifier if the acquired node identifier is not valid, and a deferral procedure which defers the retry procedure if a link is not available.

    5.
    发明专利
    未知

    公开(公告)号:MX9204928A

    公开(公告)日:1993-03-01

    申请号:MX9204928

    申请日:1992-08-26

    Applicant: IBM

    Abstract: A method for acquiring the node identifier of a node in a data processing input/output (I/O) system having a plurality of nodes. This procedure is part of the initialization of each node in the I/O system and may be used to establish the configuration of the I/O system such that if a connection breaks or a fault occurs between nodes, the configuration can be confirmed after the break or fault is corrected. This prevents data from being sent to the wrong device if lines were connected in a different configuration during the correction of a fault. The node identifier is a worldwide-unique identifier such that only one node is identified by a node identifier. The node identifier contains a validity code that specifies if the node identifier is valid. Also disclosed is a retry procedure for retrying the acquisition of a node identifier if the acquired node identifier is not valid, and a deferral procedure which defers the retry procedure if a link is not available.

    7.
    发明专利
    未知

    公开(公告)号:DE68928381D1

    公开(公告)日:1997-11-20

    申请号:DE68928381

    申请日:1989-07-14

    Applicant: IBM

    Abstract: The present invention relates to apparatus for transmitting data between a central processor (12) and one or more remote peripheral devices (30, 32, 34) comprising one or more channels (14) connected between the processor and one or more peripheral device controllers (24, 26, 28) for controlling one or more peripheral devices (30, 32, 34) in response to signals from the channel in accordance with a predetermined communications protocol, and a serial data link adapter (17) connected between one of the channels and one or more of the peripheral device controllers for extending the range of communications between the channels and the controllers. According to the invention, the apparatus is characterised in that the serial data link adapter (17) comprises first and second sub-adapters (16, 20) each communicating with the other across the serial data link and each sub-adapter having transmit and receive sections, in that the transmit section of each of the sub-adapters comprises frame generation means (40A, 40B) responsive to signals received from the channel (14) and the peripheral device controllers respectively, the signals conforming to the predetermined protocol, the frame generation means including means for generating one or more unique start frame characters in response to control signals received by the frame generation means, means for generating predetermined idle characters, the idle characters having an error imune relationship with the start frame characters, such that idle characters having single and double bit errors transmitted on the serial data link will not be recognized as start frame characters, an encoder (50A, 50B) for encoding data for efficient and error free transmission over the data link, a serializer (60A, 60B) for converting the encoded data from parallel format to serial format, and link interface and driver means (110A, 110B) for transmitting serialized encoded data into the serial data link and in that the receive section of each of the sub-adapters comprises a receiver (80A, 80B) for receiving the encoded serialized data, a deserializer (90A, 90B) for converting the serial encoded data to parallel format, a decoder (100A, 100B) for recovering digital data in an error free form, and interface means (110A, 110B) for reconstructing data and control signals in the predetermined protocol for transmission to the one or more peripheral device controllers or to the channel.

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