Abstract:
PROBLEM TO BE SOLVED: To provide low latency and low error performance measurement capability. SOLUTION: In a weighted event counting system and method for processor performance measurements, a weighted performance counter (WPC) accumulates a performance count according to a plurality of event signals provided from functional units in the processor. Differing weights are applied to the event signals according to the correlation between each event and processor performance. The weights may be provided from programmable registers, so that the weights can be adjusted under program control. The event signals may be combined to reduce the bit-width of the set of event signal, with mutually-exclusive events merged in single fields of the combinatorial result and events having the same weights merged according to a sub-total. The weights are applied to the combinatorial result and used to update a performance count. The performance count can then be used by power management software or hardware to make adjustments in operating parameters of the processor. COPYRIGHT: (C)2008,JPO&INPIT
Abstract:
In a multi-node non-uniform memory access (NUMA) multi-processor system, a designated node synchronization processor on each node, is synchronized. Individual nodes accomplish internal synchronization of the other processors on each node utilizing well known techniques. Thus it is sufficient to synchronize one processor on each node. Node zero, a designated system node that acts as a synchronization manager, estimates the time it takes to transmit information in packet form to a particular, remote node in the system. As a result a time value is transmitted from the remote node to node zero. Node zero projects the current time on the remote node, based on the transmission time estimate and compares that with its own time and either updates its own clock to catch up with a leading remote node or sends a new time value to the other node, requiring the remote node to advance its time to catch up with that on node zero. Code on the remaining nodes is mostly passive, responding to packets coming from node zero and setting the time base value when requested. Monotonicity of the time bases is maintained by always advancing the earliest of the two time bases so as to catch up with the later one.
Abstract:
A method for dynamic power and performance calibration of a data processing system is provided in the illustrative embodiments. A synthesized program loaded in the data processing system is executed responsive to detecting an event in the data processing system. The synthesized program is configured to generate a set of data that is indicative of the data processing system's power-performance characteristics under varying conditions of operation. Using the set of data, a determination is made of a performance limit on an operation of the data processing system under present operating conditions of the data processing system. A parameter of the data processing system is calibrated to operate the data processing system within the performance limit.