公开(公告)号：JP2000001782A

公开(公告)日：2000-01-07

申请号：JP7810099

申请日：1999-03-23

Applicant: IBM

Inventor： DONALD RENE WALL ,  GARANT JOHN J ,  PRETTYMAN KEVIN MICHAEL ,  REDDY SRINIVASA S-N

IPC: C23C16/14 ,  C23C16/44 ,  H01L21/285

Abstract: PROBLEM TO BE SOLVED: To provide a method for depositing a source metal on a receiving metal joined to a ceramic substrate. SOLUTION: A CVD(chemical vapor deposition) process is indicated. In this process, nickel or a nickel alloy is deposited on the surface of a receiving metal 12. At this time, an iodine source is used, and at least one kind of inert separating material 23 to be in contact with the surface of the receiving metal is used. This method fundamentally enables the CVD of Ni on Mo or Wo. The nickel source is physically separated from the surface of the high m.p. metal to be plated by using at least one kind of inert material. The inert material is in contact with the surface of the m.p. metal to be coated with nickel in a state of being floated.

公开(公告)号：JPH1065286A

公开(公告)日：1998-03-06

申请号：JP16553497

申请日：1997-06-23

Applicant: IBM

Inventor： GARANT JOHN J ,  INDYK RICHARD F

IPC: B32B18/00 ,  H01L23/538 ,  H01L23/58 ,  H05K1/02 ,  H05K1/03 ,  H05K1/11 ,  H05K3/40 ,  H05K3/46

Abstract: PROBLEM TO BE SOLVED: To device the realization of a multilayer ceramic board, in which a stress is reduced. SOLUTION: A multilayer ceramic board for microelectronics comprises stress release pads 50 and 52, and a stress in the vicinity of a functional via 14, which is made to penetrate the ceramic board, is reduce. The pads 50 and 52 are provided only in the main surface of a ceramic layer. Accordingly, it is not an obstacle that wirings 66 and 68 are located directly under the pads 50 and 52 and are provided in the bottom of the same cearmic layer or are provided in the upper surface, which is located directly under the pads 50 and 52, of the ceramic layer.