公开(公告)号：CA2142028A1

公开(公告)日：1995-10-02

申请号：CA2142028

申请日：1995-02-07

Applicant: IBM

Inventor： BLACKMON HERMAN L ,  DREHMEL ROBERT A ,  GROSBACH LYLE E ,  HASELHORST KENT H ,  KROLAK DAVID J ,  MARCELLA JAMES A ,  PAULSON PEDER J

IPC: G06F13/42 ,  G06F13/40 ,  G06F13/36

Abstract: A shared bus non-sequential data ordering method and apparatus are provided. A maximum bus width value and a minimum transfer value are identified. A minimumnumber of sub-transfers is identified responsive to the identified maximum bus width value and the minimum transfer value. A bus unit having a maximum number of chips to receive and/or send data receives data in a predefined order during multiple sub-transfers. During each data sub-transfer, a corresponding predefined word is transferred to each chip of the bus unit.