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    METHOD AND DEVICE FOR PROTECTING PART OF MEMORY
    1.
    发明专利
    METHOD AND DEVICE FOR PROTECTING PART OF MEMORY 失效

    公开(公告)号：JPH10254786A

    公开(公告)日：1998-09-25

    申请号：JP31352797

    申请日：1997-11-14

    Applicant: IBM

    Inventor： ESKESEN FRANK NORMAN ,  HACK MICHEL HENRI THEODORE ,  HALIM NAGUI ,  KING RICHARD PERVIN

    IPC: G06F12/16 ,  G06F9/46 ,  G06F12/14

    Abstract: PROBLEM TO BE SOLVED: To prevent data saved in a memory from being destroyed owing to an error of an application program by providing a visible part and a hidden part for a memory in a computer system and using the hidden part to save data to be transmitted. SOLUTION: An operating system(OS) 4 can be addressed to the visual part 30 of the memory. The addressing possibility of the process or OS 4 is excluded from the hidden part 60 of the memory. The hidden part 60 is used to save data to be transmitted by the processor or OS 4. A communication area arranged at the visible part 30 receives a data access request from the processor or OS 4. A hide server 70 which addresses both the visible part 30 and hidden part 60 receives the data access request from the communication area and starts data access to the hidden part 60.

    DYNAMICALLY COMPOSING DATA STREAM PROCESSING APPLICATIONS
    3.
    发明专利
    DYNAMICALLY COMPOSING DATA STREAM PROCESSING APPLICATIONS 未知

    公开(公告)号：CA2755317C

    公开(公告)日：2017-09-19

    申请号：CA2755317

    申请日：2010-05-13

    Applicant: IBM

    Inventor： AMINI LISA ,  ANDRADE HENRIQUE ,  GEDIK BUGRA ,  HALIM NAGUI ,  PARTHASARATHY SRINIVASAN

    IPC: G06F7/00 ,  G08G1/00

    Abstract: Techniques for dynamically modifying inter-connections between components in an application are provided. The techniques include receiving a data producer profile for each output port within a software application to be executed on one or more processors, receiving a data subscription profile for each input port of each component of the application, establishing connections between the output ports and the input ports of the components in the application based on a comparison of each data producer profile and each data subscription profile, executing the application on one or more processors to process streams of data, receiving either or both of a new data producer profile or a new data subscription profile during the execution of the application, and establishing at least one new connection between an output port and an input port based upon a revised comparison of the received data profiles that include the new data profile.

    DYNAMICALLY COMPOSING DATA STREAM PROCESSING APPLICATIONS
    4.
    发明专利
    DYNAMICALLY COMPOSING DATA STREAM PROCESSING APPLICATIONS 未知

    公开(公告)号：CA2755317A1

    公开(公告)日：2010-11-18

    申请号：CA2755317

    申请日：2010-05-13

    Applicant: IBM

    Inventor： AMINI LISA ,  ANDRADE HENRIQUE ,  GEDIK BUGRA ,  HALIM NAGUI ,  PARTHASARATHY SRINIVASAN

    IPC: G06F13/00

    Abstract: Techniques for dynamically modifying inter-connections between components in an application are provided. The techniques include receiving a data producer profile for each output port within a software application to be executed on one or more processors, receiving a data subscription profile for each input port of each component of the application, establishing connections between the output ports and the input ports of the components in the application based on a comparison of each data producer profile and each data subscription profile, executing the application on one or more processors to process streams of data, receiving either or both of a new data producer profile or a new data subscription profile during the execution of the application, and establishing at least one new connection between an output port and an input port based upon a revised comparison of the received data profiles that include the new data profile.

    COMPOSICION DINAMICA DE APLICACIONES DE PROCESAMIENTO DE FLUJO DE DATOS.
    7.
    发明专利
    COMPOSICION DINAMICA DE APLICACIONES DE PROCESAMIENTO DE FLUJO DE DATOS. 未知

    公开(公告)号：MX2011010795A

    公开(公告)日：2011-10-28

    申请号：MX2011010795

    申请日：2010-05-13

    Applicant: IBM

    Inventor： AMINI LISA ,  ANDRADE HENRIQUE ,  GEDIK BUGRA ,  HALIM NAGUI ,  PARTHASARATHY SRINIVASAN

    IPC: G06F13/00

    Abstract: Se proporcionan técnicas para modificar dinámicamente interconexiones entre componentes en una aplicación. Las técnicas incluyen recibir un perfil de un productor de datos por cada puerto de salida dentro de una aplicación de programas y sistemas de programación o software a ser ejecutada en uno o más procesadores, recibir un perfil de suscripción de datos por cada puerto de entrada de cada componente de la aplicación, establecer conexiones entre los puertos de salida y los puertos de entrada de los componentes en la aplicación sobre la base de una comparación de cada uno del perfil del productor de datos y cada perfil de la suscripción de datos, ejecutar la aplicación en uno o más procesadores para procesar flujos de datos, recibir cualquiera o ambos de un nuevo perfil del productor de datos o un nuevo perfil de suscripción de datos durante la ejecución de la aplicación, y establecer al menos una nueva conexión entre un puerto de salida y un puerto de entrada sobre la base de una comparación revisada de los perfiles de datos recibidos que incluya su nuevo perfil de datos.

    8.
    发明专利
    未知

    公开(公告)号：DE69710034T2

    公开(公告)日：2002-09-26

    申请号：DE69710034

    申请日：1997-11-06

    Applicant: IBM

    Inventor： ESKESEN FRANK NORMAN ,  HACK MICHEL HENRI THEODORE ,  HALIM NAGUI ,  KING RICHARD PERVIN

    IPC: G06F12/16 ,  G06F9/46 ,  G06F12/14

    Abstract: A memory (20) in a computer system includes a visible portion (30) and a hidden portion (60). The visible portion (30) of the memory (20) is addressable by a processor (15a-15n) and the operating system (40) operating within the computer system. Addressability by either the processor or the operating system is excluded to the hidden portion of the memory. The hidden portion of the memory is used for storing data transmitted by either the processor or the operating system. A communications area (80), located in the visible portion of memory receives requests for data access from either the processor or the operating system. A hidden server (70) which addresses both the visible portion of memory and the hidden portion of memory receives requests for data access from the communications area and initiates data access from the hidden memory.

    9.
    发明专利
    未知

    公开(公告)号：DE69710034D1

    公开(公告)日：2002-03-14

    申请号：DE69710034

    申请日：1997-11-06

    Applicant: IBM

    Inventor： ESKESEN FRANK NORMAN ,  HACK MICHEL HENRI THEODORE ,  HALIM NAGUI ,  KING RICHARD PERVIN

    IPC: G06F12/16 ,  G06F9/46 ,  G06F12/14

    Abstract: A memory (20) in a computer system includes a visible portion (30) and a hidden portion (60). The visible portion (30) of the memory (20) is addressable by a processor (15a-15n) and the operating system (40) operating within the computer system. Addressability by either the processor or the operating system is excluded to the hidden portion of the memory. The hidden portion of the memory is used for storing data transmitted by either the processor or the operating system. A communications area (80), located in the visible portion of memory receives requests for data access from either the processor or the operating system. A hidden server (70) which addresses both the visible portion of memory and the hidden portion of memory receives requests for data access from the communications area and initiates data access from the hidden memory.

    Method and apparatus for protecting portions of memory
    10.
    发明专利
    Method and apparatus for protecting portions of memory 未知

    公开(公告)号：SG73478A1

    公开(公告)日：2000-06-20

    申请号：SG1997003909

    申请日：1997-10-29

    Applicant: IBM

    Inventor： ESKESEN FRANK NORMAN ,  HACK MICHEL HENRI THEODORE ,  HALIM NAGUI ,  KING RICHARD PERVIN

    IPC: G06F12/16 ,  G06F9/46 ,  G06F12/14

    Abstract: A memory (20) in a computer system includes a visible portion (30) and a hidden portion (60). The visible portion (30) of the memory (20) is addressable by a processor (15a-15n) and the operating system (40) operating within the computer system. Addressability by either the processor or the operating system is excluded to the hidden portion of the memory. The hidden portion of the memory is used for storing data transmitted by either the processor or the operating system. A communications area (80), located in the visible portion of memory receives requests for data access from either the processor or the operating system. A hidden server (70) which addresses both the visible portion of memory and the hidden portion of memory receives requests for data access from the communications area and initiates data access from the hidden memory.

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