公开(公告)号：US3492653A

公开(公告)日：1970-01-27

申请号：US3492653D

申请日：1967-09-08

Applicant: IBM

Inventor： FOSDICK THERON ,  HAMBURGEN ARTHUR ,  HENNIS ROBERT B

IPC: G06K9/72 ,  G11B13/00

CPC classification number: G06K9/72 ,  G06K2209/01

公开(公告)号：CA746620A

公开(公告)日：1966-11-15

申请号：CA746620D

Applicant: IBM

Inventor： HAMBURGEN ARTHUR

公开(公告)号：DE1474163A1

公开(公告)日：1969-04-30

申请号：DE1474163

申请日：1964-03-04

Applicant: IBM

Inventor： HAMBURGEN ARTHUR

IPC: G06F11/10

Abstract: 988,924. Error detection and correction. INTERNATIONAL BUSINESS MACHINES CORPORATION. March 2,1964 [March 4, 1963], No. 8653/64. Heading G4R. Apparatus for checking and correcting readings by a character reading device of character groups each comprising a number of data characters and a redundant check character whose value causes a group to satisfy an arithmetic checking formula, includes a first store for storing correctly read characters of a group and a second store for storing at least two uncertainty characters for each uncertainty character position of the group, and means to present the correctly read characters with all possible combinations of the uncertainty characters and to determine which, if any, of the combinations satisfy the arithmetic checking formula. In the particular embodiment, a character group comprises five (four data and one check) decimal digits, the check digit being chosen so that all the digits add up to an integral multiple of ten. The digits are read (no details of reading) in turn from a document, each character causing the energization of one of ten lines 24 ideally (Fig. 4a). If the character is dubious, two or more of the lines will be energized, and if the character reader cannot even make "guesses" in this manner a separate "failure to recognise" line 46 is energized. Energization of one or more of the lines 24 triggers off a chain of latches 36 and delays 38 to sample the ten lines 24 in turn, each one which is energized being recoded by a coding network 25 (AND-gates) into pure binary form on leads 41. If more than one of the lines 24 are energized at a time, a "two or more signals detector" 42 (a magnetic core) produces an "uncertainty" signal on line 43 which gates the binary signals on loads 41 into a shift register (Fig. 4d). This shift register comprises bi-stable units (SRUs) 90 to 97 for the highest binary order and similar units (not shown) for the other three binary orders. If the two or more "uncertainty characters" (i.e. possibilities for the uncertain character), the first goes into SRUs 90 and the second into SRUs 94. If there is no uncertainty about the character (only one of lines 24 energized), the binary signals on loads 41 are instead gated into an output buffer 26 (shift register or magnetic drum). In the case of an uncertain character or a "failure to recognise", 1111 is read into output buffer 26. When two or more failures to recognise, or an uncertainty together with a failure, occur in a given character group, the document is rejected (top left, Fig. 4a). Correct characters, besides being read into output buffer 26, are also applied to a modulus-10 adder 27 (Fig. 4b). If the adder output is zero (as tested by an AND-gate 68) and there are no uncertainties or failures, AND-gate 70 (Fig. 4b) responds to indicate "character group read correctly" in which case the contents of output buffer 26 are passed to an output device (not shown). If there is one failure and no uncertainties, the complemented adder output is stored in latches (flip-flops) 88, and during readout of output buffer 26,the 1111 character is detected by an AND-gate 83 (Fig. 4a) which substitute the contents of latches 88 for it. Otherwise the adder output is passed along lines 104 to the shift register, the highest order bit being stored in both SRUs 90 and 94,for example (previous data stored in these having been shifted along as necessary). This adder output is then shifted out of the shift register with each possible set of possibilities for the uncertain characters, in turn, the shifted out bits being reinserted into the shift register (through OR-gates 103) and also fed to the adder 27. The various possible sets are obtained by shifting out of the SRUs 90 or 93 and 94 to 97 alternately, there being provision for interchanging the contents of SRUs 92 and 96 and also SRUs 93 and 97. This interchanging is done by outputs from a binary counter comprising latches 150, 170,171, (bottom, Fig. 4d) which is fed a number of pulses FC7 equal to two to the power of the number of uncertainties as evidenced by the state of a counter comprising latches 110 to 113 (Fig. 4c) which counted the number of pulses produced by the "two or more signals detector" 42 (Fig. 4a). Every time a pulse FC7 is produced in response to pulses PP applied to a terminal 125 (Fig. 4c), a binary counter comprising latches 127 to 130 (Fig. 4c) increases by one and when the count reaches the number stored in latches 110 to 113, one of three AND-gates 134 to 136 produces an output to stop production of FC7 pulses. The latches 110 to 113 also ensure that the document is rejected if there are more than three uncertainties. Each time bits from the SRUs are shifted out into adder 27, the adder output is tested by AND-gates 68 to see if it is zero. The first zero output results in the current count of the binary counter 150, 170, 171 being stored in a set of latches 190 (Fig. 4d). Any second zero will result in the rejection of the document (Fig. 4b, bottom right). After the required number of shiftings out to adder 27, pulses RG3 are produced and used to cycle the binary counter 150, 170,171 to the value stored in latches 190 (Fig. 4d) equality being detected by AND-gates 205, 207. The contents of the output buffer 26 (Fig. 4a) are then read out to the output device, except that characters 1111 (as detected by AND-gate 83) are replaced by the correct characters stored in the shift register SRUs (Fig. 4d). The ten inputs to the coding network 25 (Fig. 4a) are provided with plug connections so that the inputs may be effectively interchanged: this is equivalent to changing the code and allows likely pairs of mutually-cancelling reading errors to be made non-cancelling. In a modification, the order of the lines 24 from the character reader may be changed to ensure that the two most likely possibilities for some commonly uncertain characters are stored in the SRUs (since only the first two are stored), or more SRUs may be provided. Letters as well as numbers may be dealt with.

公开(公告)号：DE1774782A1

公开(公告)日：1972-01-20

申请号：DE1774782

申请日：1968-09-05

Applicant: IBM

Inventor： FOSDICK THERON ,  HAMBURGEN ARTHUR ,  BAILY HENNIS ROBERT

IPC: G06K9/72 ,  G06F11/00

Abstract: 1,236,455. Character recognition. INTERNATIONAL BUSINESS MACHINES CORP. 30 Aug., 1968 [8 Sept., 1967], No. 41418/68, Heading G4R. Word classifying apparatus for use with a character reader comprises an error word generator for generating, from an input word, error words into which the reader might change the input word when reading, and the probability of each change, a ratio calculator for calculating the ratio of the frequency of the usage of an error word as a legitimate word to the probability of an input word being changed into it, and classifying means for classifying each input word and error word in accordance with the output of the ratio calculator. A confusion pair file 12 holds a series of pairs of letters which a character reader is likely to confuse, i.e. recognize the-first of the pair as the second, each pair being accompanied by the probability P of the confusion. Each name in a file 10 of common names is taken in turn and each letter in turn is compared against the first letter of each pair from file 12. On equality, an error name is generated from the common name by replacing the letter giving equality with the second letter of the pair. The error name is compared at 16 with the names in a file 18 to determine if it is a legitimate name in its own right, and if it is, a ratio calculator 20 calculates the ratio of N L , the number of occurrences of the error name as a legitimate name in a population, read from file 18, over N E , the number of times the error name would be produced in mistake for the common name. N E is obtained by multiplying the probability P of letter confusion, from file 12, by the number N c of occurrences of the common name in the population, from file 10. In order to use the above results to replace some names from a character reader by statistically more likely names before feeding them to an output, and mark all output names either " accept " or " reject ", the error names are sent to a file 26 via a register 24, each error name being followed by the corresponding common name from file 10 if replacement of the former by the latter will be required. Each common name from file 10 is also sent. The names are accompanied by " replace " and " accept/reject " tag bits set by a classifier 22 under control of the ratio &c. to indicate: (a) where a common name has a corresponding error name but the latter is not a legitimate name in its own right, that the error name is to be replaced by the common name and the output marked " accept ", (b) where a common name has a corresponding error name which is a legitimate name in its own right, that the error name is to be replaced by the common name and the output marked " accept " if the ratio is less than or equal to 0À05, replaced by the common name and the output marked " reject " if the ratio is greater than 0À05 but less than or equal to 1, the output marked " reject " if the ratio is over 1 and less than 20, and the output marked 'accept" if the ratio is greater than or equal to 20, (c) a common name is to be marked " accept " at the output. A name from a character reader is compared at 30 with each name from file 26 in turn (excluding those included in the file as names to be changed to) until equality, when the name in file 26 giving the equality or the following file name (according to the former name's " replace " tag bit) is passed to an output register 36 together with its " accept/reject " tag bit. If no name in the file 26 matches the name from the character reader, the latter name is passed to register 36 and marked " accept " or " reject " according as the name equals one in an uncommon name file 38 or not, as determined by comparisons at 30.

公开(公告)号：DE1255362B

公开(公告)日：1967-11-30

申请号：DEI0015822

申请日：1958-12-24

Applicant: IBM DEUTSCHLAND

Inventor： GREANIAS EVON CONSTANTINE ,  HAMBURGEN ARTHUR

IPC: G06K9/32 ,  G06K9/64

Abstract: 880,785. Automatic character reading. INTERNATIONAL BUSINESS MACHINES CORPORATION. Dec. 30, 1958 [Dec. 30, 1957], No. 42088/58. Class 106 (1). In an apparatus for sensing and recognizing printed characters the characters are scanned and means operating in synchronism with the scanning means advance the signals into a storage matrix 19, Fig. 1, so that the character shape is represented by a pattern of signals, recognition circuits 31 connected to the matrix responding when the pattern is properly located in the matrix. The sheet 1 carrying the character 2 is passed by feed rollers 4, 5 under a series of sensing elements e.g. photo-cells or magnetic reading heads 15 if the character is magnetic. There are 18 sensing elements H1- H18, Fig. 2, covering a broad scan over the area likely to be occupied by the character. This allows for considerable misalignment, the character being covered by only nine of these elements. The lines from the sensing elements are connected through Or gates OR1-OR9 in two groups of nine, to nine channels SC1-SC9 through which the sensed signals pass to the store matrix 19 which consists of 9 X 5 shift register stages. For synchronization a magnetic drum rotates with the feed rollers and timing marks thereon produce clock signals in head 23 which pass to syn- chronizing circuits 25 controlling circuits 27, 29 governing the horizontal and vertical shift of the pattern in the shift register matrix. Horizontal and vertical control.-Signals from head 23, Fig. 2, are amplified at 43 and applied to a mono-stable unit 45 the output of which on terminal H controls horizontal shift of the pattern into the store as the character passes under the sensing elements. The output from unit 45 is also inverted and provides on terminal H a negative pulse. The clock pulse also sets a trigger 49 controlling a free-running multivibrator 51 which produces pulses while the trigger is set. These pulses are counted in a trigger chain 53, 55, 57 and after a count of eight the trigger 49 is reset by trigger 57 to stop the multivibrator. After each clock pulse, therefore, a group of eight pulses is supplied and applied via the monostable unit 59 to the vertical shift control terminal V, the signal being inverted to form a corresponding negative pulse on terminal V. The shift register matrix.-The matrix store consists of nine rows of five trigger circuits, all triggers being connected to the horizontal and vertical shift lines H, H, V, V. A vertical shift pulse causes the contents of each trigger to advance to the trigger above it in its column, the top trigger being connected to the bottom one of the column so that the contents of a column can circulate. A horizontal shift pulse advances the contents of each trigger to the trigger in the adjacent column, not in the same row but in the row above. The horizontal shift pulse therefore causes a diagonal shift of one column and one row. Since after each horizontal shift pulse there are eight vertical shift pulses, the contents of each column circulate and the pattern signals are effectively displaced one step to the right remaining on the same level. As the character is sensed the pattern moves across the matrix in synchronism being circulated vertically between horizontal steps. At some time in this process, before the pattern passes out of the store, it will occupy the top seven rows as shown for numeral " 2 " in Fig. 5a and at this instant one of the recognition circuits connected to certain shift register stages will respond to the pattern present. Recognition.-The recognition circuits use combinations of three out of four expected signals at predetermined locations and as a check, the absence of signals at other locations. The combinations for " 2 " are shown in the table of Fig. 5. There are three combinations of locations where signals should be present, i.e. " black " positions and one of locations where signals should be absent, i.e. " white " positions. The first black combination 1B is of positions A2, B1, E2 and E3. The second, 2B, is concerned with positions on the diagonal line A7, B6, C5 and D4 and the third, 3B, with position on the base: A7, B7, D7 and E7. The white combination is of points A5, A6, E5 and E6. As shown in Fig. 6, signals from these stages are gated together in fours e.g. stages A2, B1, E2 and E3 are connected in threes to And gates 111, 112, 113 and 114. If any three of the stages have a signal one of the gates will pass an output via Or gate 115 to And gate 117. Or gates 122 and 128 pass signals if at least three out of the four signals are present for combinations 2B and 3B. Signals from stages A5, A6, E5 and E6 representing the white combination W are inverted and applied to gates 134-137 in the same way. The And gate 117 needs four combination signals, an " S " signal and a " DIH " signal before it can produce an output signifying that character " 2 " has been recognized. The S signal is derived from the circuit of Fig. 2 by delaying the horizontal or vertical shift signals. This ensures that the triggers are properly set after a shift before the gate 117 can open. The DIH signal is derived from the read-out and checking circuit and it ensures that the output storage and checking circuits have had time to operate in respect of the previous character before the present character is applied to these circuits. The DIH pulse, after the first character, is provided by delaying the signal appearing at the outputs of the latches, these being combined by an Or gate. Checking.-When a character is recognized an output appears on the corresponding line, e.g. 2LO, Fig. 6. These signals are temporarily stored on latches and the outputs are applied to a summing amplifier connected to two threshold devices. One of these responds if no character is recognized to give a signal on a " blank " line and the other responds if more than one character is recognized and this prevents read-out from the latches. Alarms may be operated also. Scanning by optical dissection.-In the form of Fig. 8 the image of the character which is illuminated by lamps 191, 192 is dissected in a series of vertical cuts by a rotating slotted disc 195 co-operating with a vertical slot 194. The light passing through the slots is received by a photo-cell 201. Timing pulses are derived from magnetic drum 205 rotating with the disc. The data appearing serially from the photo-cell is amplified and entered in the top left-hand stage A1 of the shift register matrix. The shift is downwards and, when the next scan through the character is about to be made, horizontally into the next column. Thereafter the pattern circulates between horizontal steps as before until it is properly positioned for recognition. Specifications 710,554, 806,457 and 874,709 are referred to.

公开(公告)号：DE1150235B

公开(公告)日：1963-06-12

申请号：DEI0013039

申请日：1957-03-29

Applicant: IBM DEUTSCHLAND

Inventor： GREANIAS EVON CONSTANTINE ,  HAMBURGEN ARTHUR

IPC: G04F10/10 ,  G06K9/00 ,  G06K9/20 ,  G06K9/80

Abstract: 948,821. Automatic character recognition. INTERNATIONAL BUSINESS MACHINES CORPORATION. June 16, 1960 [June 29, 1959], No. 21141/60. Heading G4R. Intervals of time between a datum pulse and a variable pulse are registered in an apparatus having a plurality of time-analogue voltage generators each associated with one cycle of a number of cycles, switching means switching the input pulses in each cycle into the corresponding generator, means for storing the time analogue voltage for a cycle and means for regenerating an interval pulse. The apparatus is described as applied to a character recognition system Fig. 2 in which a character on a moving card 41 is projected by lens 47 on to a revolving slotted disc 53 dissecting the image in vertical scans. A photo-cell 57 produces corresponding signals which after amplification, clipping and inversion are used to reset a trigger 72 previously set at the beginning of the scan by a timing pulse T1 read from a magnetic drum 65 revolving with the disc 53. The trigger 72 therefore produces pulses Vg whose duration represents the distance from the beginning of the scan to the intersection with the tops of the character. A delay 71 produces other timing pulses T2. The purpose of the apparatus is to determine the slope of the upper contour of the character e.g. a "6" as shown in Fig. 5. The distance X1 from the beginning of scan a which is a time value is converted into a voltage and stored until the next scan when it is compared with the time X2 taken in the following scan. The interval pulses Vg, one for each scan are applied to three gates 81, 83, 85, Fig. 3a which are enabled in succession by outputs from a chain of three triggers 73, 75, 77, and distributed to three charge and storage circuits 87, 89, 91. The pulse Vg when present in circuit 87 (say) causes normally conducting valve 93 to turn off and allows condenser 102 to charge from a +250 v source. The duration of the pulse Vg is therefore linearly converted into a voltage on condenser 102. A cathode follower 105 produces a corresponding output signal. Timing signals from the trigger chain are used to gate out these signals in succession through OR gate 113 on to line 115 and the condenser 102 is then discharged by a corresponding discharge circuit 117, 119, 121. The amplitude signal in line 115 is converted back to a timed pulse signal in a circuit comprising a condenser 157 which, when valve 153 is cut off by a T1 pulse at the beginning of a scan, charges at a linear rate to produce a saw-tooth voltage. The valve 143 acts as a threshold circuit conducting when the sawtooth voltage from condenser 157 on the grid exceeds the voltage on the cathode from line 115. The output from the anode is differentiated at 163, 165, squared and amplified in inverters 171, 173, and applied as a timed pulse on line 177 to triggers 179 and 181 Fig. 3b. The former turns on and the latter turns off on receipt of this signal. The interval pulse Vg from the next scan is also applied to the triggers turning 179 off and 181 on. If the pulse on line 177 arrives after the end of pulse Vg, trigger 179 remains on whereas if it arrives before the end of pulse Vg, trigger 181 remains on. The triggers are interconnected through gates 183, 185 and inverters 187, 189 to ensure that only one is on at any time. If trigger 179 is on a negative slope is indicated and a positive slope is indicated by trigger 181 being turned on. The output from the operative trigger is a duration pulse the length of which indicates the difference in time between intersections with the upper edge of the character on adjacent scans, that is, it indicates the slope. The polarity of the slope is stored on triggers 191, 193 and the magnitude is converted to an amplitude signal on condenser 205 by charging it for the duration of the pulse. The amplitude signal is applied to a pair of threshold devices 211, 213 responding to a gentle slope and a steep slope respectively. The outputs are stored on triggers 233,235. The signals from triggers 191, 193, 233 and 235 are combined in five ways in AND gates 237, 239, 241,243 and 245. These give indications that the slope is gentle and positive, gentle and negative, steep and positive, steep and negative or zero respectively. Successive gate signals indicate the slope of the upper edge of the character for each adjacent pair of scans. Signals representing the slope at predetermined scans may be used with other feature signals in character recognition circuitry.

公开(公告)号：CA754740A

公开(公告)日：1967-03-14

申请号：CA754740D

Applicant: IBM

Inventor： GREANIAS EVON C ,  HAMBURGEN ARTHUR

公开(公告)号：CA700211A

公开(公告)日：1964-12-22

申请号：CA700211D

Applicant: IBM

Inventor： HAMBURGEN ARTHUR ,  GREANIAS EVON C

公开(公告)号：DE1166522B

公开(公告)日：1964-03-26

申请号：DEI0017459

申请日：1959-12-24

Applicant: IBM

Inventor： GREANIAS EVON CONST ,  HAMBURGEN ARTHUR ,  LEIMER JOHN JOSEPH

IPC: G06K9/38

Abstract: 936,032. Character-recognition systems. INTERNATIONAL BUSINESS MACHINES CORPORATION. Dec. 23, 1959 [Dec. 29, 1958], No. 43641/59. Class 106 (1). General.-Elemental areas of a character are examined in a plurality of adjacent scans to produce signals indicating whether a black or white region is being scanned, successive signals are integrated and applied to a threshold device giving an output representing black for example, if the value of the integrated signal over a complete scan of an elemental area exceeds a predetermined threshold value, and sample signals are derived to indicate the nature of at least one sample part of each elemental area, these sample signals being used in conjunction with the signals integrated over a complete scan of the elemental area to determine whether the area should be regarded as being black or white when the integrated signal fails to reach the threshold level. First embodiment. - A character is scanned in a series of narrow vertical rasters each comprising k elemental areas, each area being examined by four horizontal scans. The output of photomultiplier 15, Fig. 1, is clipped to produce trains of two-state signals Vc representing black or white. Pulses S, R are produced at the end of each horizontal scan and vertical raster respectively, a pulse S4 is produced for the duration of every fourth horizontal scan, and pulse Z marks the end of every fourth horizontal scan. Pulses S define areas over which successive vertical rasters overlap. The signals Vc are applied to integrator 31, Fig. 2, which supplies clippers 43, 45. If the elemental area scanned is more than 50% black, trigger 53 is set and the output Vs is " black." The signals Vs are supplied to character recognition circuitry and also to a shift register or other storage device (e.g. delay line or magnetic tape or drum) which provides signals at terminals Ak, Al indicating the previous " black " or " white " decisions made in respect of the elemental areas horizontally and vertically adjacent to the area being scanned. The vertical edge which overlaps the previouslyscanned horizontally adjacent area is examined by integrator 33 and clipper 65 (set at 15% black), and the leading horizontal edge is examined by integrator 35 and clipper 77 (also set at 15% black). If the area is between 25% and 50% black and (a) the threshold level of clipper 65 is not exceeded, or the horizontally adjacent area is not black, and (b) the threshold level of clipper 77 is not exceeded, or the vertically adjacent area is not black, then gate 61 is not inhibited by inverter 63 and Vs is again "black." Second embodiment, Fig. 4.-In this system the vertical rasters do not overlap. The signals Vc are applied to a delay device 115 introducing an overall delay of one horizontal scan interval and having tappings. 117, 119. Trigger 134 is set if two black regions in the third and fourth horizontal scans lie directly one above the other, and trigger 135 is set if three black regions (spaced by amounts determined by tappings 117, 119) occur in any horizontal scan (or two adjacent scans). If the area is more than 75% black, trigger 113 is set and Vs is " black." If the area is between 50% and 75% black, trigger 111 is set and if (a) trigger 135 is not set and Ak indicates " black," or (b) trigger 134 is not set and Al indicates " black," then gate 137 is not inhibited and Vs is " black." If the area is between 25% and 50% black, trigger 109 is set, and if (a) trigger 134 is set and the inverted signal NAk indicates " white," or (b) trigger 135 is set and the inverted signal NA1 indicates " white," or (c) triggers 134, 135 are both set then Vs is again black.

公开(公告)号：DE1159200B

公开(公告)日：1963-12-12

申请号：DEJ0019199

申请日：1960-12-22

Applicant: IBM

Inventor： HAMBURGEN ARTHUR

IPC: G06K9/36