AREA FILLING HARDWARE FOR A COLOUR GRAPHICS FRAME BUFFER

    公开(公告)号:DE3376594D1

    公开(公告)日:1988-06-16

    申请号:DE3376594

    申请日:1983-12-22

    Applicant: IBM

    Abstract: The terminal comprises a raster scan cathode ray tube display and a graphics processor providing a bit pattern corresponding to the desired image. A buffer stores the patterns generated by the processor to refresh the cathode ray tube. An auxiliary memory holds pattern representing the outline of an area to be displayed on the screen, together with control logic operating in response to the processor. The memory is loaded with the outline pattern and then fills the outline with a desired pattern. The outline is derived by using Bresenham's algorithm, and exclusive-OR gates are used to provide edge filling logic.

    2.
    发明专利
    未知

    公开(公告)号:AT518308T

    公开(公告)日:2011-08-15

    申请号:AT03702716

    申请日:2003-01-30

    Applicant: IBM

    Abstract: A method ( 300 ) and arrangement for LZ1 compression of a data string where multiple input symbols are compared in parallel with the history buffer by: holding in an input buffer ( 140 ) a first sequence of bytes of the data string; holding in a history buffer ( 110, 120 ) a second sequence of bytes of the data string; comparing ( 170 ), in matrix comparison means coupled to the input buffer and the history buffer and having a plurality of rows and columns of comparison units ( 200 ), bytes held in the input buffer with bytes held in the history buffer, bytes of the history buffer being coupled to diagonally displaced comparison units in the matrix comparison means; detecting ( 150 ) in each of the rows the column in which a largest number of consecutive byte matches has occurred at the comparison unit in that row and preceding comparison units in the same column; and encoding ( 160 ) as a token a sequence of matched bytes detected in the step of detecting ( 150 ).

    METHOD AND ARRANGEMENT FOR DATA COMPRESSION

    公开(公告)号:CA2485566A1

    公开(公告)日:2003-11-20

    申请号:CA2485566

    申请日:2003-01-30

    Applicant: IBM

    Abstract: A method (300) and arrangement for LZ1 compression of a data string where multiple imput symbols are compared in parallel with the history buffer by: holding in an input buffer (140) a first sequence of bytes of the data strin g; holding in a history buffer (110, 120) a second sequence of bytes of the dat a string; comparing (170), in matrix comparison means coupled to the input buffer and the history buffer and having a plurality of rows and columns of comparison units (200), bytes held in the input buffer with bytes held in th e history buffer, bytes of the history buffer being coupled to diagonally displaced comparison units in the matrix comparison means; detecting (150) i n each of the rows the column in which a largest number of consecutive byte matches has occurred at the comparison unit in that row and preceding comparison units in the same column; and encoding (160) as a token a sequenc e of matched bytes detected in the step of detecting (150).

    METHOD AND ARRANGEMENT FOR DATA COMPRESSION ACCORDING TO THELZ7 ALGORITHM

    公开(公告)号:CA2485566C

    公开(公告)日:2008-05-13

    申请号:CA2485566

    申请日:2003-01-30

    Applicant: IBM

    Abstract: A method (300) and arrangement for LZ1 compression of a data string where multiple imput symbols are compared in parallel with the history buffer by: holding in an input buffer (140) a first sequence of bytes of the data strin g; holding in a history buffer (110, 120) a second sequence of bytes of the dat a string; comparing (170), in matrix comparison means coupled to the input buffer and the history buffer and having a plurality of rows and columns of comparison units (200), bytes held in the input buffer with bytes held in th e history buffer, bytes of the history buffer being coupled to diagonally displaced comparison units in the matrix comparison means; detecting (150) i n each of the rows the column in which a largest number of consecutive byte matches has occurred at the comparison unit in that row and preceding comparison units in the same column; and encoding (160) as a token a sequenc e of matched bytes detected in the step of detecting (150).

    METHOD AND ARRANGEMENT FOR DATA COMPRESSION

    公开(公告)号:PL371971A1

    公开(公告)日:2005-07-11

    申请号:PL37197103

    申请日:2003-01-30

    Applicant: IBM

    Abstract: A method ( 300 ) and arrangement for LZ1 compression of a data string where multiple input symbols are compared in parallel with the history buffer by: holding in an input buffer ( 140 ) a first sequence of bytes of the data string; holding in a history buffer ( 110, 120 ) a second sequence of bytes of the data string; comparing ( 170 ), in matrix comparison means coupled to the input buffer and the history buffer and having a plurality of rows and columns of comparison units ( 200 ), bytes held in the input buffer with bytes held in the history buffer, bytes of the history buffer being coupled to diagonally displaced comparison units in the matrix comparison means; detecting ( 150 ) in each of the rows the column in which a largest number of consecutive byte matches has occurred at the comparison unit in that row and preceding comparison units in the same column; and encoding ( 160 ) as a token a sequence of matched bytes detected in the step of detecting ( 150 ).

    CIRCUIT AND METHOD FOR USE IN DATA COMPRESSION

    公开(公告)号:AU2003215713A1

    公开(公告)日:2003-11-11

    申请号:AU2003215713

    申请日:2003-01-30

    Applicant: IBM

    Abstract: An apparatus for performing data compression is disclosed. A circuit ( 640 ) within a comparison unit ( 400 ) of a comparison matrix ( 170 ) performs LZ1 compression of a data string by comparing bytes held in an input buffer ( 140 ) with bytes held in a history buffer ( 110, 120 ). A group of logic gate stages ( 720, 730, 740, 750 ) is connected in series with each other. Each of the logic gate stages produces a carry value that is passed to one of the output of the comparison unit and another logic gate stages. The product of the number stages in the logic gate stages and the number logic gates in each of the logic gate stages is less than the number of logic gates required for an equivalent circuit having a single logic circuit stage.

    METHOD AND ARRANGEMENT FOR DATA COMPRESSION ACCORDING TO THE LZ77 ALGORITHM

    公开(公告)号:AU2003205839A1

    公开(公告)日:2003-11-11

    申请号:AU2003205839

    申请日:2003-01-30

    Applicant: IBM

    Abstract: A method ( 300 ) and arrangement for LZ1 compression of a data string where multiple input symbols are compared in parallel with the history buffer by: holding in an input buffer ( 140 ) a first sequence of bytes of the data string; holding in a history buffer ( 110, 120 ) a second sequence of bytes of the data string; comparing ( 170 ), in matrix comparison means coupled to the input buffer and the history buffer and having a plurality of rows and columns of comparison units ( 200 ), bytes held in the input buffer with bytes held in the history buffer, bytes of the history buffer being coupled to diagonally displaced comparison units in the matrix comparison means; detecting ( 150 ) in each of the rows the column in which a largest number of consecutive byte matches has occurred at the comparison unit in that row and preceding comparison units in the same column; and encoding ( 160 ) as a token a sequence of matched bytes detected in the step of detecting ( 150 ).

    8.
    发明专利
    未知

    公开(公告)号:DE3578470D1

    公开(公告)日:1990-08-02

    申请号:DE3578470

    申请日:1985-09-10

    Applicant: IBM

    Abstract: A graphics display apparatus with a combined bit buffer and character graphics store includes a coded display buffer containing pointers to the store. The store is constituted by odd and even memories used to derive bit patterns for odd and even character cell columns on the display and is partitioned into a font area and a bit buffer area. In a first mode of operation, compatible with existing programmed symbol arrangements, pointers in the coded display buffer in conjunction with odd/even select signals and slice signals derive the bit patterns for each raster scan line of the display. In a second mode of operation, a graphic image to be displayed is stored as a bit map in the bit buffer area: the required bit pattern is derived using slice and odd/even select signals in conjunction with pointers stored in the coded display buffer.

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