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公开(公告)号：JPS62102349A
公开(公告)日：1987-05-12
申请号：JP20979386
申请日：1986-09-08
Applicant: IBM
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Patent Agency Ranking
公开(公告)号：DE3688277T2
公开(公告)日：1993-10-28
申请号：DE3688277
申请日：1986-09-16
Applicant: IBM
Inventor： AAKRE DAVID ELGAR , ABRAHAMSON DOUGLAS JOHN , BERGLUND NEIL CLAIR , BETTERMANN VINCENT ALFRED , HEIM LLOYD STEPHEN , MOE KENNETH ARDELLE
Abstract: An automatic address assignment system (10) has a plurality of I/O devices (20,22,...M,28,30,...P(14) coupled to a bus. Each device contains a unique machine-readable identifier which is used to select the device for address assignment. The identifier is a binary bit string. Each bit position in the bit string is selected by the host in a serial manner with the host specifying which binary value is being solicited. All devices whose identifier digit matches the solicited value respond positively and remain in contention for address assignment. The other devices will not respond and drop out of contention for address assignment until the sequence is restarted from the first bit. After the bit sequence is completed, the address for that device is bused to the device, and the sequence is restarted from the first bit until all devices have been assigned an address.
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3.发明专利
公开(公告)号：DE3370212D1
公开(公告)日：1987-04-16
申请号：DE3370212
申请日：1983-09-20
Applicant: IBM
Inventor： DIX GARY LEE , HEIM LLOYD STEPHEN , HERALD ROBERT FREDERICK , QUINLAN WILLIAM PATRICK
Abstract: Error information is passed across a limited interface (10) from a disk drive to its using system by making use of the read data line during a fault mode operation. Fault mode operation is detected by a pulse width detector (46) in an adapter between the using system and the disk drive. The pulse width detector detects the presence of a fault signal on the read data line and inhibits the passage of the spindle motor on (MTR ON) signal from the using system to the disk drive. The step signal (STEP) normally used to index the recording head is passed to the disk drive during fault mode operation. A microcomputer (30) at the disk drive detects the absence of the MTR ON signal and the presence of the step signal and outputs a fault data bit. Thereafter, the fault data word is gated onto the read data line at the rate of one bit per step so long as the MTR ON signal is absent.
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公开(公告)号：DE3783155T2
公开(公告)日：1993-07-01
申请号：DE3783155
申请日：1987-01-23
Applicant: IBM
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公开(公告)号：DE3688277D1
公开(公告)日：1993-05-19
申请号：DE3688277
申请日：1986-09-16
Applicant: IBM
Inventor： AAKRE DAVID ELGAR , ABRAHAMSON DOUGLAS JOHN , BERGLUND NEIL CLAIR , BETTERMANN VINCENT ALFRED , HEIM LLOYD STEPHEN , MOE KENNETH ARDELLE
Abstract: An automatic address assignment system (10) has a plurality of I/O devices (20,22,...M,28,30,...P(14) coupled to a bus. Each device contains a unique machine-readable identifier which is used to select the device for address assignment. The identifier is a binary bit string. Each bit position in the bit string is selected by the host in a serial manner with the host specifying which binary value is being solicited. All devices whose identifier digit matches the solicited value respond positively and remain in contention for address assignment. The other devices will not respond and drop out of contention for address assignment until the sequence is restarted from the first bit. After the bit sequence is completed, the address for that device is bused to the device, and the sequence is restarted from the first bit until all devices have been assigned an address.
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公开(公告)号：DE3783155D1
公开(公告)日：1993-02-04
申请号：DE3783155
申请日：1987-01-23
Applicant: IBM
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