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公开(公告)号：FR2386102A1
公开(公告)日：1978-10-27
申请号：FR7804981
申请日：1978-02-15
Applicant: IBM
Inventor： HENKELS WALTER H
Abstract: A superconducting memory cell which includes a single Josephson junction or write gate disposed in a superconducting loop having improved sense margins is disclosed. The improved sense margins are achieved by fabricating the superconducting loop so that first and second branches thereof have different inductances. In a specific example, a first branch containing the single Josephson junction has the higher inductance. Still more specifically, the inductance of the first branch containing the Josephson junction or write gate is twice as great as the inductance of the other branch when the Imin of the write gate is zero. In addition, another Josephson junction or sense gate must be disposed in electromagnetically coupled relationship with the second branch of the loop, and binary information must be stored in the form of clockwise and counterclockwise circulating currents of equal magnitude. Writing and reading are accomplished by coincident currents being applied to the cell. A cell having a single control current in addition to a gate current for coincident current selection of a desired cell is shown. A similar cell having at least another control current in addition to the previously mentioned control current and a gate current for coincident current selection is also disclosed. The latter cell, embodied in array form, has a plurality of horizontally disposed control lines each of which intersects a row of memory cells. In addition, a diagonally disposed control line intersects the write gates of adjacent cells which are disposed in diagonally spaced relationship with each other. Arrays which include diagonal control lines have improved write margins and, if they conform to the criteria outlined above, they also have improved sense margins.
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公开(公告)号：DE2810610A1
公开(公告)日：1978-10-05
申请号：DE2810610
申请日：1978-03-11
Applicant: IBM
Inventor： HENKELS WALTER H
Abstract: A superconducting memory cell which includes a single Josephson junction or write gate disposed in a superconducting loop having improved sense margins is disclosed. The improved sense margins are achieved by fabricating the superconducting loop so that first and second branches thereof have different inductances. In a specific example, a first branch containing the single Josephson junction has the higher inductance. Still more specifically, the inductance of the first branch containing the Josephson junction or write gate is twice as great as the inductance of the other branch when the Imin of the write gate is zero. In addition, another Josephson junction or sense gate must be disposed in electromagnetically coupled relationship with the second branch of the loop, and binary information must be stored in the form of clockwise and counterclockwise circulating currents of equal magnitude. Writing and reading are accomplished by coincident currents being applied to the cell. A cell having a single control current in addition to a gate current for coincident current selection of a desired cell is shown. A similar cell having at least another control current in addition to the previously mentioned control current and a gate current for coincident current selection is also disclosed. The latter cell, embodied in array form, has a plurality of horizontally disposed control lines each of which intersects a row of memory cells. In addition, a diagonally disposed control line intersects the write gates of adjacent cells which are disposed in diagonally spaced relationship with each other. Arrays which include diagonal control lines have improved write margins and, if they conform to the criteria outlined above, they also have improved sense margins.
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Patent Agency Ranking
公开(公告)号：FR2309987A1
公开(公告)日：1976-11-26
申请号：FR7536646
申请日：1975-11-21
Applicant: IBM
Inventor： HENKELS WALTER H
Abstract: Superconducting devices comprising at least a pair of Josephson tunneling junctions and means for providing a large kinetic inductance interconnecting the pair of Josephson junctions are disclosed. The kinetic inductance is obtained by providing, as a portion of the device, a superconducting element having a thickness much less than its penetration depth. The high inductance devices provided by this means permit an overall increase in device packing density and power reduction, not obtainable with conventional structures. The resulting devices have enhancement ratios of at least one.
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公开(公告)号：CA1314991C
公开(公告)日：1993-03-23
申请号：CA600744
申请日：1989-05-25
Applicant: IBM
Inventor： DHONG SANG H , LU NICKY C-C , HENKELS WALTER H
IPC: G11C11/405 , G11C11/404 , G11C11/409 , H01L21/8238 , H01L21/8242 , H01L27/06 , H01L27/092 , H01L27/108 , G11C11/24
Abstract: YO987-103 COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR TRANSISTOR AND ONE-CAPACITOR DYNAMIC-RANDOM-ACCESS MEMORY CELL AND FABRICATION PROCESS THEREFOR A complementary MOS one-capacitor dynamic RAM cell which operates with a non-boosted wordline without a threshold loss problem and which includes one storage capacitor and n- and p-type transfer devices connected to the storage capacitor which function as two complementary transistor devices having gates controlled by complementary signals on the RAM wordlines.
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公开(公告)号：CA1101546A
公开(公告)日：1981-05-19
申请号：CA297895
申请日：1978-02-28
Applicant: IBM
Inventor： HENKELS WALTER H
Abstract: JOSEPHSON MEMORY CELLS HAVING IMPROVED NDRO SENSING A superconducting memory cell which includes a single Josephson junction or write gate disposed in a superconducting loop having improved sense margins is disclosed. The improved sense margins are achieved by fabricating the superconducting loop so that first and second branches thereof have different inductances. In a specific example, a first branch containing the single Josephson Junction has the higher inductance. Still more specifically, the inductance of the first branch containing the Josephson junction or write gate is twice as great as the inductance of the other branch when the Imin of the write gate is zero. In addition, another Josephson junction or sense gate must be disposed in electromagnetically coupled relationship with the second branch of the loop, and binary information must be stored in the form of clockwise and counterclockwise circulating currents of equal magnitude. Writing and reading are accomplished by coincident currents being applied to the cell. A cell having a single control current in addition to a gate current for coincident current selection of a desired cell is shown. A similar cell having at least another control current in addition to the previously mentioned control current and a gate current for coincident current selection is also disclosed. The latter cell, embodied in array form, has a plurality of horizontally disposed control lines each of which intersects a row of memory cells. In addition, a diagonally disposed control line intersects the write gates of adjacent cells which are disposed in diagonally spaced relationship with each other. Arrays which include diagonal control lines have improved write margins and, if they conform to the criteria outlined above, they also have improved sense margins. YO976-068 -1-
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公开(公告)号：CA1030272A
公开(公告)日：1978-04-25
申请号：CA238131
申请日：1975-10-20
Applicant: IBM
Inventor： HENKELS WALTER H
IPC: H01L39/22
Abstract: Superconducting devices comprising at least a pair of Josephson tunneling junctions and means for providing a large kinetic inductance interconnecting the pair of Josephson junctions are disclosed. The kinetic inductance is obtained by providing, as a portion of the device, a superconducting element having a thickness much less than its penetration depth. The high inductance devices provided by this means permit an overall increase in device packing density and power reduction, not obtainable with conventional structures. The resulting devices have enhancement ratios of at least one.
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公开(公告)号：DE2556777A1
公开(公告)日：1976-07-08
申请号：DE2556777
申请日：1975-12-17
Applicant: IBM
Inventor： HENKELS WALTER H
IPC: H01L39/22
Abstract: Superconducting devices comprising at least a pair of Josephson tunneling junctions and means for providing a large kinetic inductance interconnecting the pair of Josephson junctions are disclosed. The kinetic inductance is obtained by providing, as a portion of the device, a superconducting element having a thickness much less than its penetration depth. The high inductance devices provided by this means permit an overall increase in device packing density and power reduction, not obtainable with conventional structures. The resulting devices have enhancement ratios of at least one.
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