公开(公告)号：US3805139A

公开(公告)日：1974-04-16

申请号：US29375171

申请日：1971-09-29

Applicant: IBM

Inventor： HOFFMAN H ,  KNICKMEYER K

IPC: H02J9/06 ,  H02M5/45 ,  H02M7/529 ,  H02M7/00

CPC classification number: H02M7/529 ,  H02J9/062 ,  H02M5/45 ,  Y10T307/615 ,  Y10T307/625

Abstract: A multi-phase programmed pulse waveform generating inverter control system for controlling power switches to provide transient free electric power to a critical load in synchronism with a utility power source.

Abstract translation: 一种多相程序脉冲波形发生逆变器控制系统，用于控制功率开关以与公用电源同步地向关键负载提供瞬时自由电力。

公开(公告)号：US3794906A

公开(公告)日：1974-02-26

申请号：US3794906D

申请日：1972-09-29

Applicant: IBM

Inventor： HOFFMAN H ,  KNICKMEYER K

IPC: H02M7/48 ,  H02M3/22

CPC classification number: H02M7/4807

Abstract: A full wave inverter circuit having a DC input voltage and an AC output voltage of controlled fundamental frequency. Constant amplitude voltage pulses are applied to a center tapped primary winding of a transformer to generate alternating current pulses in a center tapped secondary winding of the transformer. The center tapped secondary winding is connected to a converter to convert the alternating current pulses into unidirectional positive pulses and alternately into unidirectional negative pulses which are applied to an electrical load through a filter. The width and repetition of the constant amplitude voltage pulses is varied so that the integral of the converted alternating current pulses constitutes a lower frequency alternating current output waveform.

Abstract translation: 具有直流输入电压和受控基频的交流输出电压的全波逆变电路。 将恒定幅度电压脉冲施加到变压器的中心抽头初级绕组，以在变压器的中心抽头次级绕组中产生交流脉冲。 中心抽头次级绕组连接到转换器，以将交流脉冲转换为单向正脉冲，并交替地转换成通过滤波器施加到电负载的单向负脉冲。 改变恒定幅度电压脉冲的宽度和重复，使得转换的交流脉冲的积分构成较低频率的交流输出波形。

公开(公告)号：SE357647B

公开(公告)日：1973-07-02

申请号：SE356769

申请日：1969-03-14

Applicant: IBM

Inventor： HOFFMAN H ,  SAIA J

IPC: G05F3/22 ,  H03F1/30 ,  H03F1/32 ,  H03F3/18 ,  H03F3/195 ,  H03F3/343 ,  H03F3/347 ,  H03H11/40 ,  H03F3/04

Abstract: 1,256,736. Transistor circuits. INTERNATIONAL BUSINESS MACHINES CORP. 12 March, 1969 [15 March, 1968], No. 12907/69. Heading H3T. [Also in Division G3] The collector of each transistor 10, 12, Fig. 2, of a complementary pair is connected to the base of the other transistor and is also connected to a respective diode 15, 17, to form a three terminal network 22, 23, 25 (or 21, 24, 25, Fig. 3, not shown). The diodes may be the functions of further transistors (Figs. 1b, 1c, not shown) and each transistor 10, 12 may be replaced by a complementary pair (Fig. 1a, not shown) in which the collector of one is joined to the emitter of the other, and the base of the one to the collector of the other. Circuits employing this three terminal network are: (a) An impedance converter (Fig. 4, not shown) in which a voltage is applied (at 25) and the impedance between a terminal (22) and ground is negative and proportional to the impedance Z R between another terminal (23) and ground; (b) A voltage regulator (Fig. 5, not shown) in which a voltage is applied (at 25), a reference voltage (at 23), a start-up diode (33) is connected in the reverse direction across diode (15) and a diode (37) is connected between the output terminals (22) and 23 for overvoltage protection, the voltage across a load R1 connected at 22 being regulated. In an alternative regulator (Fig. 8, not shown) two complete networks as in Fig. 2 are connected in cascade. If I 0 rises due to a fall in load impedance R1, then the positive feedback of the circuit further increases I 0 to keep V 0 unchanged; (c) A current generator (Fig. 6, not shown) in which the current through the common terminal (25) is regulated by a reference voltage applied (at 23) through an impedance R5, the terminal (22) being grounded; (d) A differential amplifier (Fig. 7, not shown) in which a voltage is applied through impedance Rb to one terminal (25) while the voltages to be compared are applied to another terminal (at 22) and through an impedance Z r (at 23), the output Vb appearing (at 25).