公开(公告)号：DE3576052D1

公开(公告)日：1990-03-22

申请号：DE3576052

申请日：1985-12-03

Applicant: IBM

Inventor： GRIFFIN WILLIAM R ,  HELLER LAWRENCE G ,  HOROWITZ PETER N

IPC: G01R31/28 ,  G06F11/00

Abstract: A system for testing a differential logic network (10) is provided which includes a differential exclusive OR circuit (12) having a plurality of inputs for receiving complementary' signals A,A;B,) from the differential logic network and first and second output terminals (Q,Q) and means, including a conventional exclusive OR circuit (26), for determining the voltage difference between the first and second output terminals (Q,Q) to indicate the presence or absence of a fault or error in the differential logic network (10) under test.

公开(公告)号：CA1231758A

公开(公告)日：1988-01-19

申请号：CA485182

申请日：1985-06-25

Applicant: IBM

Inventor： GRIFFIN WILLIAM R ,  HELLER LAWRENCE G ,  HOROWITZ PETER N

IPC: G01R31/28 ,  G06F11/00

Abstract: Random Logic Error Detecting System For Differential Logic Networks A system for testing a differential logic network is provided which includes a differential exclusive OR circuit having a plurality of inputs for receiving complementary signals from the differential logic network and first and second output terminals and means, e.g., a conventional exclusive OR circuit, for determining the voltage difference between the first and second output terminals to indicate the presence or absence of a fault or error in the differential logic network under test.