公开(公告)号：JPH0690256A

公开(公告)日：1994-03-29

申请号：JP17529792

申请日：1992-07-02

Applicant: IBM

Inventor： TAGO KAZUYA ,  NEGISHI YASUSHI ,  HOSHIBA MIKAKO

IPC: H04L29/06 ,  H04L12/951 ,  H04L29/08 ,  H04L12/56

Abstract: PURPOSE: To decompose a packet into each component and also to assign a main storage area, without software intervention in receiving processing of a communication network. CONSTITUTION: A hardware directly performs a division operation without software intervention, by adding control information which can directly be used by a receiving end DMA feature to a communication packet. A transmitting side DMA mechanism transfers the content itself of a DMA command queue to a communication controller, before data on a computer memory is transferred to the communication controller. The information is added to the front of a packet and delivered to the receiving side. The receiving side DMA mechanism does not transfer entire packets to a single receiving buffer but performs data transfer for each element data to different receiving buffers by using both the information and information in a DMA command queue of the receiving side. Communication software uses each receiving buffer as it is, without copying it to other areas.