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    COMPUTER, INFORMATION SHARING SYSTEM AND HOLDING METHOD FOR IDENTITY OF REPLICA
    1.
    发明专利
    COMPUTER, INFORMATION SHARING SYSTEM AND HOLDING METHOD FOR IDENTITY OF REPLICA 失效

    公开(公告)号：JP2000132443A

    公开(公告)日：2000-05-12

    申请号：JP30100798

    申请日：1998-10-22

    Applicant: IBM

    Inventor： NEGISHI YASUSHI ,  MOHAN AAJA ,  TAGO KAZUYA

    IPC: G06F12/00 ,  G06F7/00 ,  H04L29/06 ,  H04L29/08

    Abstract: PROBLEM TO BE SOLVED: To improve the communication efficiency when a replica is updated by providing a control means etc., which controls the updating execution timing of the replica set in response to a received changing request based on the information included in the changing request regardless of the receiving order of the changing request. SOLUTION: A replica controller 7 adds an access to be given the data stored in a data storing device 17 and also a packet transmission request to be given to a transmission queue 9 based on the access request given from an application 5. Then the controller 7 executes the updating of a replica in the designating timing and in response to the changing request stored in a reception queue 11 by referring to the state of the queue 11. The collisions of plural application 5 and the collision caused by the application 5 between the updating of data and the data updating request included in the queue 11 are not treated, and the execution of the data changing to be carried out by the application 5 is independent of the execution of the data changing request included in the queue 11.

    FILE SYSTEM
    3.
    发明专利
    FILE SYSTEM 失效

    公开(公告)号：JPH0981430A

    公开(公告)日：1997-03-28

    申请号：JP22759395

    申请日：1995-09-05

    Applicant: IBM

    Inventor： MIMA YOSHIAKI ,  NEGISHI YASUSHI ,  KOSAKA KAZUYA

    IPC: G06F9/06 ,  G06F12/00

    Abstract: PROBLEM TO BE SOLVED: To allow the linking between applications by the access to a file. SOLUTION: This system has a file system interface means 3 converting the directory name and file name via an operating system interface according to a file system common interface 9, a bypass means preforming input/output beyond the file system common interface 9 and an operating system interface 7 when the input from the file system interface means 3 is received and a conversion means interpreting the directory name and the file name and converting them into the commands to proper programs when the input is received from the bypass means and a preliminarily determined directory name is designated.

    PACKET COMMUNICATION SYSTEM, COMMUNICATION METHOD AND PROGRAM
    4.
    发明专利
    PACKET COMMUNICATION SYSTEM, COMMUNICATION METHOD AND PROGRAM 未知

    公开(公告)号：CA2780258C

    公开(公告)日：2018-03-13

    申请号：CA2780258

    申请日：2010-11-05

    Applicant: IBM

    Inventor： KATAYAMA YASUNAO ,  NEGISHI YASUSHI ,  OKAZA-KI ATSUYA

    IPC: H04W40/34 ,  H04B7/10 ,  H04J99/00 ,  H04W16/28 ,  H04W84/18

    Abstract: To provide a system and a communication method which enable efficient packet communication by transmitting and receiving multiple packets exclusively in time and space. [Solving means] The system includes multiple nodes performing radio communication. Each node stores routing information therein, and determines a transmission path by use of the routing information, and performs cut-through transmission by transmitting and receiving packets to a transfer destination node and from a transfer source node on the determined transmission path through transmission and reception radio waves each given a certain directivity by controlling their phases. In the system, time synchronization and transmission and reception of packet communication records are performed during a certain time period by carrying out the cut-through transmission while controlling the phases of the transmission and reception radio waves so that all of the nodes form one or more closed loops. At a time other than the certain time period, the node transmits and receives packets in accordance with the routing information and a time frame assigned to each of the nodes as a time when the each node is allowed to transmit and receive a packet, the routing information held in each of the nodes and updated on the basis of the packet communication records whose information is shared by the nodes after the time synchronization.

    Method, program and parallel computer system for scheduling plural computing processes including all-to-all (a2a) communication across plural nodes (processors) constituting network
    5.
    发明专利
    Method, program and parallel computer system for scheduling plural computing processes including all-to-all (a2a) communication across plural nodes (processors) constituting network 有权
    方法，程序和并行计算机系统，用于调度包括全部（A2A）通信在一起的多个计算过程（PLA）（处理器）构成网络

    公开(公告)号：JP2013037723A

    公开(公告)日：2013-02-21

    申请号：JP2012230730

    申请日：2012-10-18

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation

    Inventor： DOI ATSUSHI ,  NEGISHI YASUSHI

    IPC: G06F15/173 ,  G06F9/50 ,  G06F15/80

    CPC classification number: G06F15/803 ,  G06F7/38 ,  G06F9/5066 ,  H04L29/08072

    Abstract: PROBLEM TO BE SOLVED: To optimally schedule a plurality of computing processes including all-to-all (A2A) communication across a plurality of nodes (processors) constituting an n-dimensional (torus or mesh) network.SOLUTION: The plurality of nodes (processors) constituting a network are partitioned into a communication (computing process) phase (A2A-L) requiring all-to-all communication for only among a plurality of nodes included in a first partial group, and a communication (computing process) phase (A2A-P) requiring all-to-all communication for only among a plurality of nodes included in a second partial group, and the phases are made to overlap for parallel processing across a plurality of threads (thread 1, thread 2, thread 3, and thread 4). Parallel processing can be performed for such a plurality of computing processes as FFT (Fast Fourier Transform) and T (transpose) (internal transpose) as well.

    Abstract translation: 要解决的问题：为了最佳地安排包括构成n维（环面或网状）网络的多个节点（处理器）的多对一（A2A）通信的计算过程。 构成网络的多个节点（处理器）被划分为仅在包括在第一部分组中的多个节点之间需要全部通信的通信（计算处理）阶段（计算过程）阶段（A2A-L） ，以及仅在包括在第二部分组中的多个节点之间进行所有通信的通信（计算处理）阶段（A2A-P），并且使这些相位跨越多个线程进行并行处理重叠 （螺纹1，螺纹2，螺纹3和螺纹4）。 也可以对FFT（快速傅里叶变换）和T（转置）（内部转置）等多个计算处理进行并行处理。 版权所有（C）2013，JPO＆INPIT

    PACKET COMMUNICATION METHOD AS WELL AS ITS TRANSMITTER AND ITS RECEIVER
    7.
    发明专利
    PACKET COMMUNICATION METHOD AS WELL AS ITS TRANSMITTER AND ITS RECEIVER 失效

    公开(公告)号：JPH0690256A

    公开(公告)日：1994-03-29

    申请号：JP17529792

    申请日：1992-07-02

    Applicant: IBM

    Inventor： TAGO KAZUYA ,  NEGISHI YASUSHI ,  HOSHIBA MIKAKO

    IPC: H04L29/06 ,  H04L12/951 ,  H04L29/08 ,  H04L12/56

    Abstract: PURPOSE: To decompose a packet into each component and also to assign a main storage area, without software intervention in receiving processing of a communication network. CONSTITUTION: A hardware directly performs a division operation without software intervention, by adding control information which can directly be used by a receiving end DMA feature to a communication packet. A transmitting side DMA mechanism transfers the content itself of a DMA command queue to a communication controller, before data on a computer memory is transferred to the communication controller. The information is added to the front of a packet and delivered to the receiving side. The receiving side DMA mechanism does not transfer entire packets to a single receiving buffer but performs data transfer for each element data to different receiving buffers by using both the information and information in a DMA command queue of the receiving side. Communication software uses each receiving buffer as it is, without copying it to other areas.

    Asynchronous checkpoint acquisition in parallel computer calculation of iteration method and restoration from there
    8.
    发明专利
    Asynchronous checkpoint acquisition in parallel computer calculation of iteration method and restoration from there 有权
    并行计算机中异步检测点的迭代方法计算及其恢复

    公开(公告)号：JP2012178027A

    公开(公告)日：2012-09-13

    申请号：JP2011040262

    申请日：2011-02-25

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： NEGISHI YASUSHI ,  ISHIKAWA TATSUYA ,  MURATA HIROKI

    IPC: G06F15/80 ,  G06F11/14

    CPC classification number: G06F11/1438

    Abstract: PROBLEM TO BE SOLVED: To acquire a checkpoint when advancing computer calculation of an iteration method in parallel, and to efficiently utilize the acquired data upon restoration.SOLUTION: When acquiring the checkpoint in parallel calculation of repeating the iteration method such as time evolution calculation, calculation is not stopped independently in each node and the checkpoint is acquired in parallel with the calculation. Thus, the need of stopping the calculation during checkpoint acquisition time is eliminated, and the calculation and the checkpoint acquisition are simultaneously performed. When the calculation is not an I/O bottleneck, the checkpoint acquisition time is concealed and execution time is reduced. In the method, checkpoint data including values at different points of time during acquisition processing is acquired, and by limiting a use to convergence calculation of iteration method, coexistence of the values at the different points of time in the checkpoint data is allowed in the problem that a convergence destination is independent of an initial value.

    Abstract translation: 要解决的问题：在并行推进迭代方法的计算机计算时获取检查点，并且在恢复时有效地利用所获取的数据。

    解决方案：在重复迭代方法如时间演化计算的并行计算中获取检查点时，在每个节点中不独立地停止计算，并且与计算并行获取检查点。 因此，消除了在检查点采集时间期间停止计算的需要，同时执行计算和检查点采集。 当计算不是I / O瓶颈时，检查点获取时间被隐藏并且执行时间减少。 在该方法中，获取包括获取处理期间的不同时间点的检查点数据，并且通过限制对迭代方法的收敛计算的使用，在该问题中允许在检查点数据中的不同时间点处的值的共存 收敛目的地与初始值无关。 版权所有（C）2012，JPO＆INPIT

    Resource reservation system and method and storage medium recording program for implementing this method
    9.
    发明专利
    Resource reservation system and method and storage medium recording program for implementing this method 有权
    资源预留系统和方法以及实施本方法的存储介质记录程序

    公开(公告)号：JP2005157955A

    公开(公告)日：2005-06-16

    申请号：JP2003398823

    申请日：2003-11-28

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： INOUE HIROSHI ,  MORIYAMA TAKAO ,  NEGISHI YASUSHI ,  OBARA MORIMIKI

    IPC: G06F9/46 ,  G06F9/48 ,  G06F15/173

    CPC classification number: G06F9/4887

    Abstract: PROBLEM TO BE SOLVED: To provide a system and a method for increasing the throughput of a system by guaranteeing the deadline of a real-time process on a CPU that uses an SMT, while implementing as many other processes as possible concurrently, and to provide a recording medium on which a program providing the functions thereof is recorded.
    SOLUTION: The system includes a measuring part 61 for measuring the computational complexity for a process obtained through a calculation process implemented by a processor 41 serving as a calculation resource; an extra time determining part 62 that causes an interrupt in the calculation process by the processor 41 to obtain the computational complexity obtained up to the time of the interrupt from the measuring part 61 and give the obtained amount of calculations to the processor 41 to calculate extra time and determine whether or not there is extra time; and a process interrupting part 63 that causes the processor 41 to interrupt the calculations of the other processes if the extra time determining part 62 determines that there is no extra time.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题：为了提供一种系统和方法，通过保证使用SMT的CPU上的实时过程的最后期限来提高系统的吞吐量，同时尽可能多地执行其他过程， 并提供记录有提供其功能的程序的记录介质。 解决方案：该系统包括测量部件61，用于测量由作为计算资源的处理器41实现的计算处理获得的处理的计算复杂度; 额外的时间确定部分62，由处理器41在计算过程中引起中断，以从测量部分61获得直至中断时获得的计算复杂度，并将获得的计算量给予处理器41以计算额外的 时间并确定是否有额外的时间; 以及过程中断部分63，如果额外时间确定部分62确定没有额外的时间，则使得处理器41中断其他进程的计算。 版权所有（C）2005，JPO＆NCIPI

    Verfahren, Programm und paralleles Computersystem für die Planung einer Vielzahl von Berechnungsverfahren einschließlich All-to-All Kommunikation (A2A) zwischen einer Vielzahl von Knoten (Prozessoren), die ein Netzwerk formen
    10.
    发明专利
    Verfahren, Programm und paralleles Computersystem für die Planung einer Vielzahl von Berechnungsverfahren einschließlich All-to-All Kommunikation (A2A) zwischen einer Vielzahl von Knoten (Prozessoren), die ein Netzwerk formen 未知

    公开(公告)号：DE112010003810B4

    公开(公告)日：2019-02-21

    申请号：DE112010003810

    申请日：2010-11-15

    Applicant: IBM

    Inventor： DOI JUN ,  NEGISHI YASUSHI

    IPC: G06F9/50 ,  G06F15/173 ,  G06F15/80

    Abstract: Eine Vielzahl von Berechnungsverfahren einschließlich All-to-All Kommunikation (A2A) wird optimal zwischen einer Vielzahl von Knoten (Prozessoren), die ein n-dimensionales (Ring oder Maschen)-Netzwerk bilden, geplant. Die Vielzahl von Knoten (Prozessoren), die das Netzwerk formen, sind aufgeteilt in eine Kommunikations- (Berechnungsverfahren) Phase (A2A-L), in der All-to-All Kommunikation nur zwischen einer Vielzahl von Knoten, enthalten in einer ersten Teil-Gruppe, erforderlich ist, und eine Kommunikations- (Berechnungsverfahren) Phase (A2A-P), in der All-to-All Kommunikation nur zwischen einer Vielzahl von Knoten, enthalten in einer zweiten Teil-Gruppe, erforderlich ist, und die Phasen werden gebildet, um für die parallele Verarbeitung über eine Vielzahl von Threads(Thread 1, Thread 2, Thread 3 und Thread 4) zu überlappen. Die parallele Verarbeitung kann für eine solche Vielzahl von Berechnungsverfahren wie FFT (schnelle Fourier-Transformation) und auch T (Transponierte) (interne Transponierte) durchgeführt werden.

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