公开(公告)号：CA1182573A

公开(公告)日：1985-02-12

申请号：CA424284

申请日：1983-03-23

Applicant: IBM

Inventor： AGNEW PALMER W ,  BUONOMO JOSEPH P ,  HOUGHTALEN STEVEN R ,  KELLERMAN ANNE S ,  LOSINGER RAYMOND E ,  VALASHINAS JAMES W

IPC: G06F9/455 ,  G06F9/22 ,  G06F9/30 ,  G06F9/318 ,  G06F9/38 ,  G06F15/16

Abstract: METHODS FOR PARTITIONING MAINFRAME INSTRUCTION SETS TO IMPLEMENT MICROPROCESSOR BASED EMULATION THEREOF Methods of applying LSI and microprocessors to the design of microprocessor-based LSI implementation of mainframe processors are described. The mainframe instruction set is partitioned into two or more subsets, each of which can be implemented by a microprocessor having special on-chip microcode or by a standard off-the-shelf microprocessor running programs written for that purpose. Alternatively, one or more of the subsets can be implemented by a single microprocessor. In addition, a subset of the partitioned instruction set can be implemented by emulating software, by off chip vertical or horizontal microcode, or by primitives. But, however partitioning is implemented, the end result thereof is to keep the critical flow paths, associated with the most frequently used instruction subset, as short as possible by constraining them to a single chip.

公开(公告)号：BR8705234A

公开(公告)日：1988-05-24

申请号：BR8705234

申请日：1987-10-02

Applicant: IBM

Inventor： BUONOMO JOSEPH P ,  CALLAHAN ROBERT W ,  HOUGHTALEN STEVEN R ,  KODUKULA SIVARAMA K ,  LOSINGER RAYMOND E ,  SHIMAMOTO BRION N ,  TREDENNICK H L ,  VALASHINAS JAMES W

IPC: G06F9/455 ,  G06F9/318 ,  G06F9/44