公开(公告)号：HK1201372A1

公开(公告)日：2015-08-28

申请号：HK15101823

申请日：2015-02-18

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID JD ,  GSCHWIND MICHAEL KARL MK ,  SCHWARZ ERIC MARK EM ,  SLEGEL TIMOTHY T ,  JACOBI CHRISTIAN C

IPC: G11C20060101

Abstract: A Load Count to Block Boundary instruction is provided that provides a distance from a specified memory address to a specified memory boundary. The memory boundary is a boundary that is not to be crossed in loading data. The boundary may be specified a number of ways, including, but not limited to, a variable value in the instruction text, a fixed instruction text value encoded in the opcode, or a register based boundary; or it may be dynamically determined.

公开(公告)号：HK1207442A1

公开(公告)日：2016-01-29

申请号：HK15108073

申请日：2015-08-20

Applicant: IBM

Inventor： GREINER DAN D ,  JACOBI CHRISTIAN C ,  SLEGEL TIMOTHY T ,  MITRAN MARCEL M

IPC: G06F20060101

Abstract: Program exception conditions cause a transaction to abort and typically result in an interruption in which the operating system obtains control. A program interruption filtering control is provided to selectively present the interrupt. That is, the interrupt from the program exception condition may or may not be presented depending at least on the program interruption filtering control and a transaction class associated with the program exception condition. The program interruption filtering control is provided by a TRANSACTION BEGIN instruction.

公开(公告)号：HK1201353A1

公开(公告)日：2015-08-28

申请号：HK15101820

申请日：2015-02-18

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID JD ,  GSCHWIND MICHAEL KARL MK ,  SLEGEL TIMOTHY T ,  SCHWARZ ERIC MARK EM ,  JACOBI CHRISTIAN C

IPC: G06F20060101

Abstract: A Load to Block Boundary instruction is provided that loads a variable number of bytes of data into a register while ensuring that a specified memory boundary is not crossed. The boundary is dynamically determined based on a specified type of boundary and one or more characteristics of the processor executing the instruction, such as cache line size or page size used by the processor.

公开(公告)号：HK1201352A1

公开(公告)日：2015-08-28

申请号：HK15101816

申请日：2015-02-18

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID JD ,  GSCHWIND MICHAEL KARL MK ,  SLEGEL TIMOTHY T ,  SCHWARZ ERIC MARK EM ,  JACOBI CHRISTIAN C

IPC: G06F20060101

Abstract: A Load to Block Boundary instruction is provided that loads a variable number of bytes of data into a register while ensuring that a specified memory boundary is not crossed. The boundary may be specified a number of ways, including, but not limited to, a variable value in the instruction text, a fixed instruction text value encoded in the opcode, or a register based boundary.