公开(公告)号：MY125928A

公开(公告)日：2006-08-30

申请号：MYPI20001267

申请日：2000-03-29

Applicant: IBM

Inventor： JAPP ROBERT M ,  POLIKS MARK D

IPC: H01K3/10 ,  H05K1/03 ,  H05K3/46

Abstract: CONDUCTIVE MATERIALS THAT HAVE LOW COEFFICIENTS OF THERMAL EXPANSION (CTES) AND THAT ARE USED FOR POWER AND GROUND PLANES ARE DISCLOSED. FIBROUS MATERIALS (SUCH AS CARBON, GRAPHITE, GLASS, QUARTZ, POLYTHYLENE, AND LIQUID CRYSTAL POLYMER FIBERS) WITH LOW CTES ARE METALLIZED TO PROVIDE A RESULTANT CONDUCTIVE MATERIAL WITH A LOW CTE. SUCH FIBERS MAY BE METALLIZED IN THEIR INDIVIDUAL STATE AND THEN FORMED INTO A FABRIC, OR THESE MATERIALS MAY BE FORMED INTO A FABRIC AND THEN METALLIZED OR A COMBINATION OF BOTH METALLIZATIONS MAY BE USED. IN ADDITION, A GRAPHITE OR CARBON SHEET MAY BE METALLIZED ON ONE OR BOTH SIDES TO PROVIDE A MATERIAL THAT HAS A LOW CTE AND HIGH CONDUCTIVITY. THESE METALLIZED, LOW CTE POWER AND GROUND PLANES MAY BE LAMINATED WITH OTHER PLANES/CORES INTO A COMPOSITE, OR LAMINATED INTO A CORE WHICH IS THEN LAMINATED WITH OTHER PLANES/CORES INTO A COMPOSITE. THE RESULTANT COMPOSITE MAY BE USED FOR PRINTED CIRCUIT BOARDS (PCBS) OR PCBS USED AS LAMINATE CHIP CARRIERS.THE MOST ILLUSTRATIVE DRAWING IS FIG.1

公开(公告)号：HK1028701A1

公开(公告)日：2001-02-23

申请号：HK00108106

申请日：2000-12-15

Applicant: IBM

Inventor： JAPP ROBERT M ,  POLIKS MARK D

IPC: H05K1/02 ,  H05K3/38 ,  H05K3/42 ,  H05K3/46 ,  H05K

Abstract: Power and ground planes that are used in Printed Circuit Boards (PCBs) and that comprise porous, conductive materials are disclosed. Using porous power and ground plane materials in PCBs allows liquids (e.g., water and/or other solvents) to pass through the power and ground planes, thus decreasing failures in PCBs (or PCBs used as laminate chip carriers) caused by cathodic/anodic filament growth and delamination of insulators. Porous conductive materials suitable for use in PCBs may be formed by using metal-coated organic cloths (such as polyester or liquid crystal polymers) or fabrics (such as those made from carbon/graphite or glass fibers), using metal wire mesh instead of metal sheets, using sintered metal, or making metal sheets porous by forming an array of holes in the metal sheets. Fabrics and mesh may be woven or random. If an array of holes is formed in a metal sheet, such an array may be formed with no additional processing steps than are performed using conventional PCB assembly methods.

公开(公告)号：CA1284938C

公开(公告)日：1991-06-18

申请号：CA547683

申请日：1987-09-24

Applicant: IBM

Inventor： CUMMINGS MICHAEL J ,  HANFORD DONALD E ,  JAPP ROBERT M

IPC: G03C1/74 ,  B32B37/00 ,  B32B37/10 ,  B32B37/22 ,  B32B37/30 ,  G03F7/16 ,  H01L21/027 ,  H05K3/06 ,  B32B31/10

Abstract: A process for laminating discrete sections of a supported photosensitive layer to a sheet substrate comprises advancing the substrate through a nip between converging surfaces of opposed heated application rolls together with a continuous length of the supported photosensitive layer. The advance of the substrate is interrupted when it reaches a first location between the application rolls as is the supply of the photosensitive layer. The converging surfaces of each of the application rolls are moved from an inactive disengaged position transversely toward the substrate to an active position to cause pressure contact between the photosensitive layer and the substrate whereby the photosensitive layer is laminated to the substrate. The substrate is again advanced with the application rolls in active position and the supple of the photosensitive layer resumed. The disclosed process avoids localized poor adhesion and the known problems stemming from that condition.