Abstract:
PROBLEM TO BE SOLVED: To provide compacted binary identifier generation.SOLUTION: Compaction of large (16-byte) IPv6 addresses into regular (4-byte) address fields is performed while preserving the properties required for a hash key, based on cumulative XOR based prehashing of 4 bytes at a time.
Abstract:
PROBLEM TO BE SOLVED: To provide an improved computer system.SOLUTION: The system may include a controller having a computer processor. The controller reduces insertion times and/or hashing collisions when interfacing with new components introduced to the controller. The system may also include a collision avoidance apparatus that reduces hashing collisions by using a plurality of tables and a plurality of keys per bucket. The system may further include a hash apparatus in communication with the controller to map the plurality of keys to the plurality of tables, where the hash apparatus uses a single hash logic to provide an avalanche effect when one key is changed, which results in change of nearly half of bits in the plurality of tables.
Abstract:
PROBLEM TO BE SOLVED: To provide a method, an apparatus, and a computer program for adding a QOS level to a packet.SOLUTION: Syntax analysis of a multi layer network communication including a nest header by a continuous network layer is performed, and a value related to a priority or a quality of service requirement (a priority indicator value) for data of each individual layer distributed over a header group is extracted. Aggregated data (a composition aggregation priority value) is applied to a table where different possible composition aggregation priority values corresponding to a lower resolution quality level value are mapped. The priority indicator value or the composition aggregation priority value can be filtered, or masked, or compressed. In one embodiment, bit subsets different from each other for storing the priority indicator values are selected based on a logical port associated with a packet and the final priority indicator value applied to a discriminated sub-table having a mapping of quality level values suitable for the logical port.
Abstract:
PROBLEM TO BE SOLVED: To provide an improved computer system.SOLUTION: An improved computer system may include a controller including a computer processor. The system may also include a selector apparatus in communication with the controller to choose a table having a higher collision quality index than other tables under consideration by the selector apparatus. The system may further include an exchanger apparatus to configure a standby table that replaces the table chosen by the selector apparatus. The system may additionally include a switch that changes a hash function on the basis of the replacement of the chosen table of the exchanger apparatus to enable the controller to reduce insertion times and/or collisions when interfacing with new components introduced to the controller.
Abstract:
PROBLEM TO BE SOLVED: To provide methods and an apparatus for improving security while transmitting a data packet. SOLUTION: In a first aspect of the present invention, a first method of transmitting a data packet is provided. The first method includes the steps of: (1) for each connection from which a data packet may be transmitted, storing header data corresponding to the connection; (2) employing a user application to form a header and payload data of a packet, wherein the user application is associated with a connection from which the packet is to be transmitted; and (3) while transmitting the packet, comparing one or more portions of the packet header data with the header data corresponding to the connection with which the user application is associated. Numerous other aspects are also provided. COPYRIGHT: (C)2008,JPO&INPIT
Abstract:
A network processor includes first communication protocol ports that each support ‘M’ minimum size packet data path traffic on ‘N’ lanes at ‘S’ Gigabits per second (Gbps) and traffic with different communication protocol units on ‘n’ additional lanes at ‘s’ Gbps. The first communication protocol ports support access to an external coprocessor using parsing logic located in each of the first communication protocol ports. The parsing logic, during a parsing period, is configured to send a request to the external coprocessor at reception of a ‘M’ size packet and to receive a response from the external coprocessor. The parsing logic sends a request maximum ‘m’ size byte word to the external coprocessor on one of the additional lanes and receives a response maximum ‘m’ size byte word from the external coprocessor on the one of the additional lanes while complying with the equation N×S/M=