Sticky and transient markers for a packet parser

    公开(公告)号:GB2532055B

    公开(公告)日:2016-12-14

    申请号:GB201419824

    申请日:2014-11-07

    Applicant: IBM

    Abstract: A packet parser has a set of marker elements each comprising a one bit latch and connected to store flag values from the results of the application of parser rules. Some marker elements are connected to provide the stored marker values as input to the parser rule logic to be taken into account in the processing of subsequent parser rules and some are connected to control external hardware. Some markers are reset at the end of each packet. A special toggle marker element toggles its value when its address is selected and other marker elements are connected to store, when its own address is selected, the value of the toggle element. Other markers toggle their own value when selected.

    NC-SI port controller
    2.
    发明专利

    公开(公告)号:GB2532052A

    公开(公告)日:2016-05-11

    申请号:GB201419817

    申请日:2014-11-07

    Applicant: IBM

    Abstract: A NC-SI Port Controller (NPC) 23 of a Network Interface Controller (NIC) provides a sideband connection between the network 2 and a Baseboard Management Controller (BMC) 17. Pass-through traffic to and from the BMC are injected and extracted by the XBB 16 and RBB 6 units of the Host Ethernet Adapter 3 part of the NIC. Asynchronous event notification (AEN) pseudopackets giving status information about the NIC are compiled 28 and injected into the data route of the NPC that carries packets from the BMC. Both of those kinds of packet pass by a packet parser 30 with the AEN pseudo-packets being dropped but their content being assembled by the NPC into an AEN packet which is then injected into the data route of the NPC that carries packets bound for the BMC. The packet parser also identifies NC-SI requests from the BMC and provides response packets in the same way. The NPC may also comprise an arbiter 21, 22, to arbitrate traffic to or from the BMC.

    Connecting an external network coprocessor to a network processor packet parser

    公开(公告)号:GB2503123B

    公开(公告)日:2017-12-20

    申请号:GB201312922

    申请日:2011-12-19

    Applicant: IBM

    Abstract: A network processor includes first communication protocol ports that each support ‘M’ minimum size packet data path traffic on ‘N’ lanes at ‘S’ Gigabits per second (Gbps) and traffic with different communication protocol units on ‘n’ additional lanes at ‘s’ Gbps. The first communication protocol ports support access to an external coprocessor using parsing logic located in each of the first communication protocol ports. The parsing logic, during a parsing period, is configured to send a request to the external coprocessor at reception of a ‘M’ size packet and to receive a response from the external coprocessor. The parsing logic sends a request maximum ‘m’ size byte word to the external coprocessor on one of the additional lanes and receives a response maximum ‘m’ size byte word from the external coprocessor on the one of the additional lanes while complying with the equation N×S/M=

    NC-SI port controller
    7.
    发明专利

    公开(公告)号:GB2532054A

    公开(公告)日:2016-05-11

    申请号:GB201419819

    申请日:2014-11-07

    Applicant: IBM

    Abstract: A Network Controller-Sideband Interface (NC-SI) Port Controller (NPC) 23 of a Network Interface Controller (NIC) provides a sideband connection between the network 2 and a Baseboard Management Controller (BMC) 17. Pass-through traffic to and from the BMC are injected and extracted by the XBB 16 and RBB 6 units of the Host Ethernet Adapter 3 part of the NIC. Asynchronous event notification (AEN) pseudopackets giving status information about the NIC are compiled 28 and injected into the data route of the NPC that carries packets from the BMC. Both of those kinds of packet pass by a packet parser 30 with the AEN pseudo-packets being dropped but their content being assembled by the NPC into an AEN packet which is then injected into the data route of the NPC that carries packets bound for the BMC. The packet parser analyses data transmitted from the sideband endpoint (BMC) towards the network and identifies NC-SI requests from the BMC and provides response packets in the same way. The NIC also comprises a Media Access Controller 4. The HEA comprises a host buffer to store a packet from the host; a sideband buffer to store a packet from the NPC and an arbiter connected to allow, at different times, a packet in the host buffer and a packet in the sideband buffer, to advance from there along a transmit route to the MAC. In-Band packets may have higher priority than sideband packets.

    NC-SI port controller
    8.
    发明专利

    公开(公告)号:GB2532053A

    公开(公告)日:2016-05-11

    申请号:GB201419818

    申请日:2014-11-07

    Applicant: IBM

    Abstract: A Network Controller-Sideband Interface (NC-SI) Port Controller (NPC) 23 of a Network Interface Controller (NIC) provides a sideband connection between the network 2 and a Baseboard Management Controller (BMC) 17. Pass-through traffic to and from the BMC are injected and extracted by the XBB 16 and RBB 6 units of the Host Ethernet Adapter 3 part of the NIC. Asynchronous event notification (AEN) pseudopackets giving status information about the NIC are compiled 28 and injected into the data route of the NPC that carries packets from the BMC. Both of those kinds of packet pass by a packet parser 30 with the AEN pseudo-packets being dropped but their content being assembled by the NPC into an AEN packet which is then injected into the data route of the NPC that carries packets bound for the BMC. The packet parser analyses data transmitted from the sideband endpoint (BMC) towards the network and identifies NC-SI requests from the BMC and provides response packets in the same way. A buffer may be employed in the transmit route for packets from the BMC headed towards the network. The buffer may employ a sliding window circuit connect ro provide a section of the data in the buffer to the packet parser. The NPC may also comprise an arbiter 21, 22, to arbitrate traffic to or from the BMC.

    Data packet processing
    10.
    发明专利

    公开(公告)号:GB2549442A

    公开(公告)日:2017-10-25

    申请号:GB201416837

    申请日:2014-09-24

    Applicant: IBM

    Abstract: An action machine (i.e. a hardware accelerator) 300 for processing packet data in a network processor (101, fig. 1) comprises first 310 and second 320 data storage units adapted to store packet data and a processing unit 330 adapted to process data from the first and second data storage units. The first and second data storage units may comprise an array of registers. The first storage unit is adapted to be accessed by the processing unit and a unit external to the action machine, i.e. a packet parser (207, fig. 2) such that the parser may load packet data to first storage unit 310 as if it was a set of Target Input Registers (TIRs). The second storage unit 320 is a private or restricted access storage unit adapted to be only accessed by the processing unit 330. The action machine is suitable for general purpose processing of packet data fields of packets adhering to the Network Controller Sideband Interface (NC-SI) protocol and may be used as a slave picoprocessor, relieving the parser (207) of data processing.

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