PERFORMANCE MONITOR FOR DATA PROCESSING SYSTEM

    公开(公告)号:JPH10275099A

    公开(公告)日:1998-10-13

    申请号:JP4912798

    申请日:1998-03-02

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide an inexpensive monitor which can improve the analysis capability of system performance in a wide range by adding a performance monitoring function to a peripheral device that is connected to a processor. SOLUTION: A system 80 includes a programmable circuit 802 which includes a performance monitoring function 50. The circuit 802 is connected to a CPU 10 via a bus 807, to a DMA controller 803 via a bus 809, to a memory controller 804 via a bus 808 and then to a bridge circuit 805 via a bus 811. The circuit 802 is used together with or in place of the CPU 10 in order to execute the performance monitoring analysis of a certain type by means of the function 50 included in the circuit 802. Thus, this performance monitor is applied to execution of the function 50 at the inside of the CPU 10 or the circuit 802 or for the combination of the CPU 10 and the circuit 802.

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