公开(公告)号：GB2518094B

公开(公告)日：2016-06-22

申请号：GB201423099

申请日：2013-05-15

Applicant: IBM

Inventor： JOSEPHINE CHANG ,  JEFFERY W SLEIGHT

IPC: H01L27/108 ,  B82Y10/00 ,  H01L21/84 ,  H01L27/12 ,  H01L29/06 ,  H01L29/66 ,  H01L29/775 ,  H01L29/94

Abstract: A semiconductor nanowire is formed integrally with a wraparound semiconductor portion that contacts sidewalls of a conductive cap structure located at an upper portion of a deep trench and contacting an inner electrode of a deep trench capacitor. The semiconductor nanowire is suspended from above a buried insulator layer. A gate dielectric layer is formed on the surfaces of the patterned semiconductor material structure including the semiconductor nanowire and the wraparound semiconductor portion. A wraparound gate electrode portion is formed around a center portion of the semiconductor nanowire and gate spacers are formed. Physically exposed portions of the patterned semiconductor material structure are removed, and selective epitaxy and metallization are performed to connect a source-side end of the semiconductor nanowire to the conductive cap structure.