公开(公告)号：JPH10189873A

公开(公告)日：1998-07-21

申请号：JP32619697

申请日：1997-11-27

Applicant: IBM

Inventor： CLAUDE LOUIS BERTIEN ,  WAYNE JOHN HOWEL ,  WILLIAM ROBERT PATRICK TONTY ,  JERSEY MARIA ZARENSKI

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L23/522 ,  H01L29/92

Abstract: PROBLEM TO BE SOLVED: To provide an integrated circuit with a developing means of fairly effective on-chip decoupling capacitance, regardless of the density of the formed circuit. SOLUTION: This integrated high-performance decoupling capacitance, formed on a semiconductor chip 10 comprising the substrate of a chip itself junctioned with metallic attachments 34 formed on the underside of presently not yet used chip is electrically connected to an active chip circuit resultingly approaching to the active circuit on the chip requiring of such a decoupling capacitance, so as to develop a fairly effective decoupling capacitance. In such a constitution, such a development can be realized by a method, wherein a dielectric layer is provided on the underside of not yet used chip so that the metallic attachments 34 formed on the underside may be electrically connected to the active chip circuit via a through-hole 30 in the chip.