公开(公告)号：JP2003282786A

公开(公告)日：2003-10-03

申请号：JP2003055672

申请日：2003-03-03

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーション

Inventor： DARBHA KRISHNA ,  JIMAREZ MIGUEL A ,  REISS MATTHEW M ,  SATHE SANJEEV B ,  CHARLES G WOJTICK

IPC: H01L23/12 ,  H01L23/498

CPC classification number: H01L23/49833 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15151 ,  H01L2924/00012

Abstract: PROBLEM TO BE SOLVED: To provide an electronic structure which is capable of reducing stress in a flip chip PBGA package.
SOLUTION: The electronic structure where a board is divided into a plurality of segments is provided. A method of forming the electronic structure comprises a first step of dividing the board into the segments and a second step of electrically connecting a semiconductor element to the segments respectively. Thermal deformation caused by a thermal cycle is restrained from occurring in the semiconductor element and the soldered joint thereof.
COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：提供一种能够减少倒装芯片PBGA封装中的应力的电子结构。 解决方案：提供了将板分成多个段的电子结构。 一种形成电子结构的方法包括将板划分成段的第一步骤和将半导体元件分别电连接到段的第二步骤。 在半导体元件及其焊接接头中抑制由热循环引起的热变形。 版权所有（C）2004，JPO

公开(公告)号：MY138376A

公开(公告)日：2009-05-29

申请号：MYPI9901137

申请日：1999-03-25

Applicant: IBM

Inventor： JIMAREZ MIGUEL A ,  JOHNSON ERIC A ,  LI LI ,  OBRZUT JAN

IPC: H01L21/56 ,  H01L23/498

Abstract: FLIP-CHIP ELECTRONIC PACKAGES ARE PROVIDED WITH A COMPLIANT SURFACE LAYER, NORMALLY POSITIONED BETWEEN AN UNDERFILL LAYER AND A SUBSTRATE SUCH AS A CHIP CARRIER OR A PRINTED CIRCUIT BOARD OR CARD, WHICH REDUCES STRESS AND STRAIN RESULTING FROM DIFFERENCES IN COEFFICIENTS OF THERMAL EXPANSION BETWEEN THE CHIP AND SUBSTRATE. THE COMPLIANT LAYER, WHICH SHOULD HAVE STORAGE MODULUS OF LESS THAN ½ THE MODULUS OF THE SUBSTRATE, PREFERABLY BETWEEN ABOUT 50,000 PSI AND ABOUT 20,000 PSI, MAY COMPRISE RUBBERY MATERIALS SUCH AS SILICONE, VIRCO-PLASTIC POLYMERS SUCH AS POLYTETRAFLUOROETHYLENE OR INTERPENETRATING POLYMER NETWORKS (IPNS). PHOTOSENSITIVE IPNS USED FOR SOLDER MARKS ARE PREFERRED.

公开(公告)号：SG92634A1

公开(公告)日：2002-11-19

申请号：SG1999001579

申请日：1999-03-31

Applicant: IBM

Inventor： JIMAREZ MIGUEL A ,  JOHNSON ERIC A ,  LI LI ,  OBRZUT JAN

IPC: H01L21/56 ,  H01L23/498 ,  H01L21/60

Abstract: Flip-chip electronic packages are provided with a compliant surface layer, normally positioned between an underfill layer and a substrate such as a chip carrier or a printed circuit board or card, which reduces stress and strain resulting from differences in coefficients of thermal expansion between the chip and substrate. The compliant layer, which should have a storage modulus of less than ½ the modulus of the substrate, preferably between about 50,000 psi and about 20,000 psi, may comprise rubbery materials such as silicone, virco-plastic polymers such as polytetrafluoroethylene or interpenetrating polymer networks (IPNs). Photosensitive IPNs used for solder marks are preferred.