公开(公告)号：DE1951552A1

公开(公告)日：1970-04-23

申请号：DE1951552

申请日：1969-10-13

Applicant: IBM

Inventor： JUN HUMBERTO CORDERO ,  BERTRAM PERKINS JUN CHARLES ,  GEORGE DRIMAK EDWARD

IPC: G06F12/14 ,  G06F11/10

Abstract: 1,247,974. Protection of stored data. INTERNATIONAL BUSINESS MACHINES CORP. 17 Sept., 1969 [18 Oct., 1968], No. 45755/69. Headings G4A and G4C. A storage protection system for preventing inadvertent alteration of data in protecetd addresses of a main data store, comprises an auxiliary data store, a local data store for storing a protection key and a storage key, means to address the local data store with an address derived from an address used in addressing the auxiliary store to fetch the protection key which is transferred into a selected one of a plurality of protection key registers, means to address the local store with an address derived from a protected address used in addressing the main store to fetch the storage key, and means to prevent the alteration of data stored at the protected data address when a mismatch is detected between the storage key and the contents of a protection key register selected by a mode register. As disclosed, the auxiliary store is part of the main store and holds I/O control words. The same address register is used for the main/auxiliary and local stores. Prior to a " channel " I/O operation, an I/O control word is accessed from the auxiliary store using an address part of which is used to obtain a protection key from the local store as described above, the protection key being placed in a channel key register for comparison with a storage key obtained from the local store when the main store location involved in the I/O operation is accessed, as described above, inequality in the comparison inhibiting a write operation in the main store (if that is what is involved), e.g. by interrupt. A communications key register is provided for the similar operation in the case of a " communications " I/O operation. A programme key register is provided to be pre-loaded with a protection key from the main or local store under programme control so that write operations in programme areas is prevented on inequality between the protection key and a storage key obtained from the local store as the main store is accessed in a programme area. A disc file key register is provided for disc I/O operations but used similarly to the programme key register, disc I/O operations being by cycle steal without use of control words from auxiliary storage. The programme key register may be used in an information transfer path from main store to local store. The value in any of the key registers may be gated into the input/output data register of the main store for display. If the protection key in the relevant key register is set to all zeroes, the protection feature is inhibited.

公开(公告)号：DE1815078A1

公开(公告)日：1969-08-28

申请号：DE1815078

申请日：1968-12-17

Applicant: IBM

Inventor： JUN HUMBERTO CORDERO ,  G DRIMAK EDWARD ,  J HUTCHINSON RICHARD ,  F SCHANGHENCY MICHAEL ,  M SHIMP EVERETT

IPC: G06F9/22 ,  G06F9/34 ,  G06F12/04 ,  G06F13/10 ,  G06F13/34 ,  G06F15/78 ,  G06F

Abstract: 1,242,437. Data processing. INTERNATIONAL BUSINESS MACHINES CORP. 9 Dec., 1968 [2 Jan., 1968]. No. 58364/68. Heading G4A. A data processing system comprises an addressable main store for storing (microprogramme) control words and other words (e.g. instructions and operands), a control register to which a control word is transferred from the main store in order to control a normal processing routine, a control word generating device responsive to a signal requesting an interrupt processing routine to generate a control word for the interrupt processing routine without reference to the main store and to place the generated control word in the control register, and an auxiliary store accessed by the generated control word to obtain the main store address concerned with the interrupt routine. An addressable local store (the auxiliary store) has locations for operands, main store addresses, indicators, counters and backup, and is addressed from logic controlled by the control register and a mode register (itself controlled by the control register). Interrupt (trap) requests (e.g. from I/O devices or error detectors) are decoded in conjunction with the contents of an MMSK register to select a main store address corresponding to the highest priority request (except that hogging of the interrupt facilities by high priority interrupt sources is prevented), the control word at this address setting a selected bit in the MMSK register. This register now overrides the mode register in the control of local store addressing. Three latches switched on in succession control logic to form and insert into the control register successive control words to control processing of the interrupt, including in the ease of I/O, accessing and updating of a main store address and a count (both from the local store) and data transfer between the main store address and the I/O device involved. Hardware is provided for insertion or deletion of word marks and group mark word marks, if the main store uses them but the I/O devices do not. The programmer may block out certain priority levels in the interrupt selection by microprogramme control of the MMSK register to insert a particular bit into it. When the interrupt has been dealt with, the interrupted microprogramme continues, main store address registers not altered during interrupt processing still holding the next address for the interrupted microprogramme.