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    ACCOUNTING METHOD AND LOGIC FOR DETERMINING PER-THREAD PROCESSOR RESOURCE UTILIZATION IN A SIMULTANEOUS MULTI-THREADED (SMT) PROCESSOR
    1.
    发明专利
    ACCOUNTING METHOD AND LOGIC FOR DETERMINING PER-THREAD PROCESSOR RESOURCE UTILIZATION IN A SIMULTANEOUS MULTI-THREADED (SMT) PROCESSOR 未知

    公开(公告)号：CA2518468A1

    公开(公告)日：2004-11-04

    申请号：CA2518468

    申请日：2004-04-14

    Applicant: IBM

    Inventor： KALLA RONALD NICK ,  LEITNER LARRY SCOTT ,  FLOYD MICHAEL STEPHEN ,  ARMSTRONG WILLIAM JOSEPH ,  SINHAROY BALARAM

    IPC: G06F9/38 ,  G06F11/34

    Abstract: An accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor provides a mechanism for accounting for processor resource usage by programs and thread s within programs. Relative resource use is determined by detecting instructio n dispatches for multiple threads active within the processor, which may inclu de idle threads that are still occupying processor resources. If instructions a re dispatched for all threads or no threads, the processor cycle is accounted equally to all threads. Alternatively if no threads are in a dispatch state, the accounting may be made using a prior state, or in conformity with ratios of the threads' priority levels. If only one thread is dispatching, that thread is accounted the entire processor cycle. If multiple threads are dispatching, but less than all threads are dispatching (in processors supporting more than two threads), the processor cycle is billed evenly acro ss the dispatching threads. Multiple dispatches may be detected for the threads and a fractional resource usage determined for each thread and the counters may be updated in accordance with their fractional usage.

    ACCOUNTING METHOD AND LOGIC FOR DETERMINING PER-THREAD PROCESSOR RESOURCE UTILIZATION IN A SIMULTANEOUS MULTI-THREADED (SMT) PROCESSOR
    3.
    发明专利
    ACCOUNTING METHOD AND LOGIC FOR DETERMINING PER-THREAD PROCESSOR RESOURCE UTILIZATION IN A SIMULTANEOUS MULTI-THREADED (SMT) PROCESSOR 未知

    公开(公告)号：CA2518468C

    公开(公告)日：2008-09-30

    申请号：CA2518468

    申请日：2004-04-14

    Applicant: IBM

    Inventor： KALLA RONALD NICK ,  LEITNER LARRY SCOTT ,  FLOYD MICHAEL STEPHEN ,  ARMSTRONG WILLIAM JOSEPH ,  SINHAROY BALARAM

    IPC: G06F11/34 ,  G06F9/38

    Abstract: An accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor provides a mechanism for accounting for processor resource usage by programs and thread s within programs. Relative resource use is determined by detecting instructio n dispatches for multiple threads active within the processor, which may inclu de idle threads that are still occupying processor resources. If instructions a re dispatched for all threads or no threads, the processor cycle is accounted equally to all threads. Alternatively if no threads are in a dispatch state, the accounting may be made using a prior state, or in conformity with ratios of the threads' priority levels. If only one thread is dispatching, that thread is accounted the entire processor cycle. If multiple threads are dispatching, but less than all threads are dispatching (in processors supporting more than two threads), the processor cycle is billed evenly acro ss the dispatching threads. Multiple dispatches may be detected for the threads and a fractional resource usage determined for each thread and the counters may be updated in accordance with their fractional usage.

    4.
    发明专利
    未知

    公开(公告)号：DE602004006858T2

    公开(公告)日：2008-02-14

    申请号：DE602004006858

    申请日：2004-04-14

    Applicant: IBM

    Inventor： ARMSTRONG WILLIAM JOSEPH ,  FLOYD MICHAEL STEPHEN ,  LEITNER LARRY SCOTT ,  KALLA RONALD NICK ,  SINHAROY BALARAM

    IPC: G06F11/34 ,  G06F9/38

    Abstract: Processor time accounting is enhanced by per-thread internal resource usage counter circuits that account for usage of processor core resources to the threads that use them. Relative resource use can be determined by detecting events such as instruction dispatches for multiple threads active within the processor, which may include idle threads that are still occupying processor resources. The values of the resource usage counters are used periodically to determine relative usage of the processor core by the multiple threads. If all of the events are for a single thread during a given period, the processor time is allocated to the single thread. If no events occur in the given period, then the processor time can be equally allocated among threads. If multiple threads are generating events, a fractional resource usage can be determined for each thread and the counters may be updated in accordance with their fractional usage.

    6.
    发明专利
    未知

    公开(公告)号：DE602004006858D1

    公开(公告)日：2007-07-19

    申请号：DE602004006858

    申请日：2004-04-14

    Applicant: IBM

    Inventor： ARMSTRONG WILLIAM JOSEPH ,  FLOYD MICHAEL STEPHEN ,  LEITNER LARRY SCOTT ,  KALLA RONALD NICK ,  SINHAROY BALARAM

    IPC: G06F11/34 ,  G06F9/38

    Abstract: Processor time accounting is enhanced by per-thread internal resource usage counter circuits that account for usage of processor core resources to the threads that use them. Relative resource use can be determined by detecting events such as instruction dispatches for multiple threads active within the processor, which may include idle threads that are still occupying processor resources. The values of the resource usage counters are used periodically to determine relative usage of the processor core by the multiple threads. If all of the events are for a single thread during a given period, the processor time is allocated to the single thread. If no events occur in the given period, then the processor time can be equally allocated among threads. If multiple threads are generating events, a fractional resource usage can be determined for each thread and the counters may be updated in accordance with their fractional usage.

    7.
    发明专利
    未知

    公开(公告)号：BRPI0409710A

    公开(公告)日：2006-05-02

    申请号：BRPI0409710

    申请日：2004-04-14

    Applicant: IBM

    Inventor： ARMSTRONG WILLIAM JOSEPH ,  FLOYD MICHAEL STEPHEN ,  LEITNER LARRY SCOTT ,  KALLA RONALD NICK ,  SINHAROY BALARAM

    IPC: G06F9/38 ,  G06F11/34

    Abstract: Processor time accounting is enhanced by per-thread internal resource usage counter circuits that account for usage of processor core resources to the threads that use them. Relative resource use can be determined by detecting events such as instruction dispatches for multiple threads active within the processor, which may include idle threads that are still occupying processor resources. The values of the resource usage counters are used periodically to determine relative usage of the processor core by the multiple threads. If all of the events are for a single thread during a given period, the processor time is allocated to the single thread. If no events occur in the given period, then the processor time can be equally allocated among threads. If multiple threads are generating events, a fractional resource usage can be determined for each thread and the counters may be updated in accordance with their fractional usage.

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