公开(公告)号：FR2375662A1

公开(公告)日：1978-07-21

申请号：FR7735660

申请日：1977-11-18

Applicant: IBM

Inventor： BODNER RONALD E ,  KISCADEN RICHARD C

IPC: G06F9/28 ,  G06F9/22 ,  G06F13/32 ,  G06F15/16 ,  G06F11/00

公开(公告)号：FR2375656A1

公开(公告)日：1978-07-21

申请号：FR7735130

申请日：1977-11-18

Applicant: IBM

Inventor： BODNER RONALD E ,  CROOKS THOMAS L ,  KISCADEN RICHARD C

IPC: G06F12/06 ,  G06F12/10 ,  G06F12/14 ,  G06F9/20

Abstract: Storage protection is provided in a computer system having address translation by loading address translate registers with valid translated addresses and with special addresses. A circuit for generating a storage exception signal is connected to receive all addresses from the translate registers which are addressed by the main storage address and generates a storage exception signal in response to detecting a special address. The address translation mode is provided for both a main storage processor and a control processor with a separate address translate control register for each processor. Address translation is automatically selected based upon interrupt level. Address translation registers are also provided for I/O operations and are controlled independently from and can be in parallel with the task address translation registers.

公开(公告)号：CA1000409A

公开(公告)日：1976-11-23

申请号：CA144645

申请日：1972-06-14

Applicant: IBM

Inventor： BROOKS EVERETT G ,  HARRIS EDWARD R ,  KISCADEN RICHARD C ,  SCHAFFER WALTER S ,  SOLTIS FRANK G ,  ZIMMERMAN DEAN O

IPC: G06F9/40