公开(公告)号：DE69209404T2

公开(公告)日：1996-10-10

申请号：DE69209404

申请日：1992-07-18

Applicant: IBM

Inventor： KOENEMANN BERND KARL FERDINAND ,  WAGNER KENNETH DAVID ,  WAICUKAUSKI JOHN ARTHUR

IPC: G01R31/28 ,  G01R31/3181 ,  G01R31/3183 ,  G06F11/27 ,  G06F11/26

Abstract: A hybrid random pattern self-test approach is employed in an on-chip fashion to provide desired test signals to circuits on the chip. A simplified weighting circuit is shown to be effective even when only a single bit from a linear feedback shift register is employed for random signal generation. The reduction in linear feedback shift register size and associated weighting circuitry enables the apparatus to be much more readily usable in an on-product configuration thus resulting in significant initial and subsequent test circuit advantages.

公开(公告)号：DE69209404D1

公开(公告)日：1996-05-02

申请号：DE69209404

申请日：1992-07-18

Applicant: IBM

Inventor： KOENEMANN BERND KARL FERDINAND ,  WAGNER KENNETH DAVID ,  WAICUKAUSKI JOHN ARTHUR

IPC: G01R31/28 ,  G01R31/3181 ,  G01R31/3183 ,  G06F11/27 ,  G06F11/26

Abstract: A hybrid random pattern self-test approach is employed in an on-chip fashion to provide desired test signals to circuits on the chip. A simplified weighting circuit is shown to be effective even when only a single bit from a linear feedback shift register is employed for random signal generation. The reduction in linear feedback shift register size and associated weighting circuitry enables the apparatus to be much more readily usable in an on-product configuration thus resulting in significant initial and subsequent test circuit advantages.

公开(公告)号：DE69114183T2

公开(公告)日：1996-05-30

申请号：DE69114183

申请日：1991-02-06

Applicant: IBM

Inventor： KOENEMANN BERND KARL FERDINAND

IPC: G01R31/28 ,  G01R31/3181 ,  G01R31/3183 ,  G01R31/319 ,  G06F11/22 ,  G06F11/26

Abstract: Seed skipping means are provided for use in conjunction with a linear feedback shift register used as a pseudo-random pattern generator for generating sequences of test bit streams for testing integrated circuit devices. The utilization of seed skipping means for the pseudo-random pattern number generator in connection with weighting of the patterns from the random pattern generator provides an effective and low cost solution to data storage problems associated with generating effective test patterns for testing integrated circuit chip devices.

公开(公告)号：DE69114183D1

公开(公告)日：1995-12-07

申请号：DE69114183

申请日：1991-02-06

Applicant: IBM

Inventor： KOENEMANN BERND KARL FERDINAND

IPC: G01R31/28 ,  G01R31/3181 ,  G01R31/3183 ,  G01R31/319 ,  G06F11/22 ,  G06F11/26

Abstract: Seed skipping means are provided for use in conjunction with a linear feedback shift register used as a pseudo-random pattern generator for generating sequences of test bit streams for testing integrated circuit devices. The utilization of seed skipping means for the pseudo-random pattern number generator in connection with weighting of the patterns from the random pattern generator provides an effective and low cost solution to data storage problems associated with generating effective test patterns for testing integrated circuit chip devices.