公开(公告)号：JP2002366366A

公开(公告)日：2002-12-20

申请号：JP2001161364

申请日：2001-05-29

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーション

Inventor： KOSEKI SATOSHI ,  TAKEUCHI MIKIO ,  KOMATSU HIDEAKI

IPC: G06F9/42 ,  G06F9/45

CPC classification number: G06F8/447 ,  G06F8/441 ,  G06F8/443

Abstract: PROBLEM TO BE SOLVED: To suppress the occurrence of a stack overflow or a stack underflow to prevent the execution performance of a program from being degraded by them in program code generation for a processor which has an architecture using a register stack.
SOLUTION: A compiler 10 is provided with a register allocator 11 which allocates registers to instructions in a program as the compilation object and a code generator 12 which generates object codes on the basis of the result of register allocation by the register allocator 11. The register allocator 11 allocates logical registers to instruction in the program as the compilation object and allocates the logical registers allocated to instructions in the program to physical registers so that physical registers existing at the time of calling procedures in the program as the compilation object may be allocated in order from the bottom of the register stack.
COPYRIGHT: (C)2003,JPO

Abstract translation: 要解决的问题：为了抑制堆栈溢出或堆栈下溢的发生，以防止在具有使用寄存器堆栈的架构的处理器的程序代码生成中程序的执行性能降低。 解决方案：编译器10具有寄存器分配器11，其将寄存器分配给作为编译对象的程序中的指令;以及代码生成器12，其根据寄存器分配器11的寄存器分配结果生成对象代码。寄存器 分配器11将逻辑寄存器分配给程序中的指令作为编译对象，并将分配给程序中的指令的逻辑寄存器分配给物理寄存器，使得在作为编译对象的程序中调用过程时存在的物理寄存器可以被分配 从寄存器堆栈的底部开始。

公开(公告)号：JP2008112400A

公开(公告)日：2008-05-15

申请号：JP2006296299

申请日：2006-10-31

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： KOCHIYA KIYOKUNI ,  KOSEKI SATOSHI ,  ONODERA TAMIYA ,  JOHNSON GRAEME

IPC: G06F9/52

CPC classification number: G06F9/526 ,  G06F9/3004 ,  G06F9/30087 ,  G06F9/522

Abstract: PROBLEM TO BE SOLVED: To achieve efficient exclusive control without using an indivisible operation instruction or a memory barrier instruction.
SOLUTION: A system in this invention is provided with: a storage device having a first storage area for storing first information indicating the acquisition or trial of an exclusive right based on a first task and a second storage area for storing second information indicating the acquisition or trial of an exclusive right based on a second task; a first acquisition part for reading out the second storage area after issuing an instruction for writing the first information in the first storage area according to a request of the first task, and when the second information is not read out, replying an exclusive right acquisition success; and a second acquisition part for executing write reflection processing capable of referring to contents written in the first storage area by the first task from the second task, reading out the first storage area after completing the write reflection processing, and when the first information is not read out from the first storage area, replying the exclusive right acquisition success.
COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：在不使用不可分割的操作指令或存储器屏障指令的情况下实现高效的排他控制。 解决方案：本发明的系统具有：存储装置，具有第一存储区域，用于存储指示基于第一任务获取或试用排他权利的第一信息;以及第二存储区域，用于存储指示 基于第二项任务获得或审判专有权; 第一获取部分，用于根据第一任务的请求发出第一信息写入指令以读出第二存储区，并且当第二信息不被读出时，回答专有权获取成功 ; 以及第二获取部分，用于执行写入反射处理，其能够从第二任务中引用由第一任务写入第一存储区域中的内容，在完成写入反射处理之后读出第一存储区域，并且当第一信息不是 从第一个存储区读出，回答专有权获取成功。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2007066017A

公开(公告)日：2007-03-15

申请号：JP2005251594

申请日：2005-08-31

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： SUGANUMA TOSHIO ,  KOSEKI SATOSHI ,  KOMATSU HIDEAKI

IPC: G06F12/00

CPC classification number: G06F17/30395 ,  G06F17/30454 ,  Y10S707/99933

Abstract: PROBLEM TO BE SOLVED: To furthermore improve the efficiency of access to a database. SOLUTION: A system for controlling access to the database is provided with: an acquisition part for acquiring an access program including a plurality of access instructions to the database; a detection part for detecting a plurality of mutually different tables to be accessed by the plurality of access instructions; a combination control part for executing a combination instruction for acquiring a result table obtained by combining the plurality of detected tables from the database prior to the execution of the plurality of access instructions; and a conversion control part for executing a conversion instruction for extracting records accessed by the plurality of access instructions from the result table and converting the extracted records into structure allowed to be accessed by the plurality of access instructions prior to the execution of the plurality of access instructions. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：进一步提高访问数据库的效率。 解决方案：用于控制对数据库的访问的系统提供有：获取部分，用于获取包括对数据库的多个访问指令的访问程序; 检测部，用于检测由所述多个访问指令访问的多个相互不同的表; 组合控制部分，用于执行用于获取通过在执行所述多个访问指令之前从所述数据库组合所述多个检测表而获得的结果表的组合指令; 以及转换控制部分，用于执行用于从结果表中提取由多个访问指令访问的记录的转换指令，并且将所提取的记录转换为在执行多个访问之前由多个访问指令允许访问的结构 说明。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2004021428A

公开(公告)日：2004-01-22

申请号：JP2002173212

申请日：2002-06-13

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： KAWAHITO MOTOHIRO ,  KOSEKI SATOSHI

IPC: G06F9/45 ,  G05B19/42 ,  G06F9/44

CPC classification number: G06F8/443 ,  G06F8/433 ,  G06F9/45508

Abstract: PROBLEM TO BE SOLVED: To improve the executing efficiency of a program by reducing the influences of an explicit order for matching the images of local variables between a code train executed via an interpreter and a compiled code train for optimizing operation.
SOLUTION: This program conversion method comprises a first step of setting a code negligible in the certain deformation of the second code train out of codes in the first code train giving influences to the deformation of the second code train during transition from the first code train where an object to be executed by a program is executed via the interpreter to the second compiled code train and a second step of performing the certain deformation of the second code train while neglecting the set negligible code. It is acceptable that it includes a third step of generating a compensation code required for the deformation of the second code train including the propagation of a copying order and inserting it into the first code train.
COPYRIGHT: (C)2004,JPO

公开(公告)号：JP2001075814A

公开(公告)日：2001-03-23

申请号：JP23253399

申请日：1999-08-19

Applicant: IBM

Inventor： KOSEKI SATOSHI ,  INAGAKI TATSUSHI ,  YASUE TOSHIAKI ,  KOMATSU HIDEAKI ,  TAKEUCHI MIKIO

IPC: G06F9/45

Abstract: PROBLEM TO BE SOLVED: To effectively optimize an object code in the range satisfying limitation caused by the number of physical registers of a processor. SOLUTION: This compiler device performs code generation from a program represented by a DAG(directed acyclic graph) while evaluating the number of used registers and the number of execution cycles and optimizes a code to be generated. That is, the compiler calculates the number of cycles with which each operation can be executed on the DAG and the number of the currently available registers, performs code generation while preceding an operator on an execution path that takes the most time in the DAG in a part where the number of registers is sufficient, and performs code generation while preceding such an operator as to reduce the number of used registers when the number of registers is not sufficient.

公开(公告)号：JP2013222303A

公开(公告)日：2013-10-28

申请号：JP2012093355

申请日：2012-04-16

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation

Inventor： TOZAWA MASAHIKO ,  KOSEKI SATOSHI

IPC: G06F9/45

CPC classification number: G06F8/51

Abstract: PROBLEM TO BE SOLVED: To quicken the execution of the code of the processing of an iterator.SOLUTION: Data conversion is expressed with generator conversion on an intermediate language having a generator, and optimized by a compiler. Thus, the data conversion is expressed with the generator conversion. Then, the in-lining rewriting of the generator is applied on the intermediate language. When a generator g is consumed in the form of a for(x:g){e} sentence, the in-lining of the generator is achieved by replacing the "for(x:g){e}" itself (by performing the in-lining of a generation side code into a consumption side code) with "the appearance of yield in the definition of g is replaced with e (by performing the in-lining of the consumption side code into the generation side code)".

Abstract translation: 要解决的问题：加快​​迭代器处理代码的执行。解决方案：数据转换用具有生成器的中间语言的生成器转换表示，并由编译器优化。 因此，数据转换用发生器转换表示。 然后，生成器的内衬重写应用于中间语言。 当以（x：g）{e}语句的形式消耗发电机g时，发电机的内衬是通过将“for（x：g）{e}”本身（通过执行 将代码代码内置到消费方代码中），其中“g的定义中的收益的出现被e（通过执行消费侧代码的内插代入代码代码）”来代替。

公开(公告)号：JP2011120122A

公开(公告)日：2011-06-16

申请号：JP2009277182

申请日：2009-12-07

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： HORII HIROSHI ,  KOSEKI SATOSHI ,  NAKAMURA HIROYOSHI ,  ONODERA TAMIYA

IPC: G06F13/00 ,  H04L12/24 ,  H04L12/70 ,  H04L12/761

CPC classification number: G06F11/3668 ,  H04L12/1854 ,  H04L12/1868 ,  H04L45/48

Abstract: PROBLEM TO BE SOLVED: To allow a plurality of clients to successively and stably transmit data to one server. SOLUTION: The present invention relates to a method for collecting data from a plurality of client computers to a server as a first mode, including the steps of: reconstructing a collection network of a tree structure with the server as a most-significant node and the plurality of client computers as slave nodes each time data are collected; broadcasting a parentage declaration from the server to the low-order nodes; and transferring data from each of nodes to high-order nodes. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：允许多个客户端连续且稳定地向一个服务器发送数据。 解决方案：本发明涉及一种用于从多个客户计算机向服务器收集数据作为第一模式的方法，包括以下步骤：重建具有服务器的最重要的树结构的收集网络 节点和多个客户端计算机作为从节点，每次收集数据; 从服务器向低阶节点广播父母声明; 并将数据从每个节点传送到高阶节点。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2006174356A

公开(公告)日：2006-06-29

申请号：JP2004367676

申请日：2004-12-20

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： KOSEKI SATOSHI ,  IMAMURA TAKESHI

IPC: H04L9/10

CPC classification number: H04L9/3242 ,  H04L2209/80

Abstract: PROBLEM TO BE SOLVED: To provide a method and system for realizing a public key cryptosystem in pseudo manner at low costs.
SOLUTION: Using a private key cryptosystem and a hardware with tamper resistance, a public key cryptosystem is realized in pseudo manner at low costs. Each user carries out communication by using equipment equipped with a hardware respectively having the same function mentioned later. That is, assignment of a key with some ID is provided and ID is made to be effective and stored by a request from a user, and decrypting and generation of MAC (message authenticator) are carried out with the key assigned to the ID. Though encrypting and inspection of MAC using an optional ID can be carried out, decrypting and generation of MAC cannot be carried out. The user keeps the ID open. A transmitter of a message encrypts the message by using the opened ID of the receiver of the message and using a hardware having the same function. Though a third party cannot carry out decrypting using the ID excepting for analyzing mechanism in the hardware, the hardware destroys itself to such a behavior.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种以低成本实现伪密码密码体制的方法和系统。 解决方案：使用私钥密码系统和具有防篡改性的硬件，以低成本实现伪密码体制。 每个用户通过使用配备有分别具有相同功能的硬件的设备进行通信。 也就是说，提供具有一些ID的密钥的分配，并且通过来自用户的请求来使ID成为有效和存储，并且使用分配给该ID的密钥来执行MAC（消息认证器）的解密和生成。 虽然可以使用可选的ID对MAC进行加密和检查，但是无法进行MAC的解密和生成。 用户保持ID打开。 消息的发送者通过使用消息的接收者的打开的ID并使用具有相同功能的硬件来加密消息。 虽然第三方不能使用ID进行解密，除了硬件中的分析机制之外，硬件会破坏自己的这种行为。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2004021336A

公开(公告)日：2004-01-22

申请号：JP2002171856

申请日：2002-06-12

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： KOSEKI SATOSHI ,  KOMATSU HIDEAKI

IPC: G06F9/45

CPC classification number: G06F8/441

Abstract: PROBLEM TO BE SOLVED: To allocate a proper register to a plurality of variables by solving the problem of delaying an execution speed of a generating command train since a variable using method is not adapted to properties of registers allocated to the variables in a computer mutually different in the respective properties of a plurality of registers. SOLUTION: This compiler converts a source program into the command train of a processor, and is provided with a simultaneously using variable acquiring part 220 for acquiring a variable simultaneously used with the variables in a plurality of respective variables used in the source program, an allocation order forming part 230 for forming a plurality of allocation orders between the plurality of variables allocated to the registers different from a variable simultaneously used with the variables, an allocation precedence acquiring part 300 for acquiring allocation precedence for indicating to which register the plurality of respective variables are preferentially allocated among the plurality of registers and a register allocation part 310 for allocating the plurality of variables to the registers according to one allocation order selected on the basis of the allocation precedence among the plurality of allocation orders. COPYRIGHT: (C)2004,JPO

公开(公告)号：JP2003256215A

公开(公告)日：2003-09-10

申请号：JP2002051246

申请日：2002-02-27

Applicant: IBM

Inventor： KOSEKI SATOSHI ,  KOCHIYA KIYOKUNI

IPC: G06F9/45

Abstract: PROBLEM TO BE SOLVED: To improve the execution efficiency of compile processing by efficiently saving and restoring the contents of a register. SOLUTION: Whether or not predetermined variables in an execution program exist beyond predetermined function calling, and beyond what kind of the function calling do those variables exist is judged, and which of a volatile register, non-volatile register, and semi-volatile register should the above mentioned variables be allocated to is decided based on the judgement. Also, which of the registers should the variables existing beyond the function calling be allocated to is decided based on the execution frequency of the function at the time of executing an execution program. COPYRIGHT: (C)2003,JPO