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    Functional storage array
    2.
    发明授权
    Functional storage array 失效
    功能储存阵列

    公开(公告)号：US3706978A

    公开(公告)日：1972-12-19

    申请号：US3706978D

    申请日：1971-11-11

    Applicant: IBM

    Inventor： DAILEY JACK R ,  KUNTZLEMAN HARRY C ,  SURGENT JOHN G

    IPC: G11C11/412 ,  G11C15/04 ,  G11C11/40

    CPC classification number: G11C15/04 ,  G11C11/412

    Abstract: A functional (content addressable, four-state) storage unit including an improved four-state (0, 1, X, Y) cell and improved drive means provides low power drain, a minimum number of inputoutput connections and in one embodiment reliable high speed operation in a large array. The array is arranged in a plurality of multi-bit words. Only two data input lines are provided for corresponding bits of the words. Binary data is applied concurrently to both data lines during read, write and search/select cycles. Only two-terminal power supply is required, and the array is preferably comprised solely of complementary insulated-gate field effect transistors operated in the enhancement mode. The array is particularly well suited to monolithic fabrication.

    Abstract translation: 包括改进的四态（0,1，X，Y）单元和改进的驱动装置的功能（内容可寻址的四状态）存储单元提供低功率消耗，最小数量的输入 - 输出连接，并且在一个实施例中可靠 高速运行在一大阵列。 该阵列被布置成多个多位字。 仅为字的相应位提供两条数据输入线。 在读，写和搜索/选择周期期间，二进制数据同时应用于两条数据线。 仅需要两端电源，并且阵列优选地仅由在增强模式下操作的互补绝缘栅场效应晶体管构成。 该阵列特别适用于单片制造。

    Functional memory storage cell
    5.
    发明授权
    Functional memory storage cell 失效
    功能内存存储单元

    公开(公告)号：US3706977A

    公开(公告)日：1972-12-19

    申请号：US3706977D

    申请日：1971-11-11

    Applicant: IBM

    Inventor： DAILEY JACK R ,  KUNTZLEMAN HARRY C

    IPC: G11C11/412 ,  G11C15/04 ,  G11C11/40

    CPC classification number: G11C15/04 ,  G11C11/412

    Abstract: An improved four-state (0, 1, X, Y) functional memory cell is disclosed which requires only two data lines (B0, B1) for writing data into, searching, and reading data out of the cell. The cell comprises a pair of latches, each preferably fabricated in complementary insulated gate field effect transistors operated in the enhancement mode. During read, write and search operations, data is applied concurrently to both data lines. The cell requires only a two-terminal power supply, assures low power drain, occupies minimum silicon area and in one embodiment provides high cell isolation permitting large, high performance arrays. The improved latch structure can also be used as a two-state associative memory storage cell.

    Abstract translation: 公开了一种改进的四状态（0，1，X，Y）功能存储单元，其仅需要用于将数据写入，搜索和从该单元读出数据的两条数据线（B0，B1）。 电池包括一对闩锁，每个闩锁优选地以在增强模式下操作的互补绝缘栅场效应晶体管制造。 在读取，写入和搜索操作期间，数据同时应用于两条数据线。 该电池仅需要两端电源，确保低功率消耗，占用最小的硅面积，并且在一个实施例中提供允许大的高性能阵列的高电池隔离。

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