公开(公告)号：HK1180796A1

公开(公告)日：2013-10-25

申请号：HK13108053

申请日：2013-07-09

Applicant: IBM

Inventor： SITTMANN III GUSTAV G ,  CRADDOCK DAVID D ,  GREGG THOMAS T ,  FARRELL MARK M ,  EASTON JANET J ,  LAIS ERIC NORMAN EN

IPC: G06F20060101

Abstract: One or more message signaled interruption requests from one or more input/output (I/O) adapters are converted to I/O adapter event notifications. Each I/O adapter event notification includes the setting of one or more specific indicators in system memory and an interruption request, the first of which results in a pending I/O adapter interruption request. While a request for an I/O adapter interruption is pending, subsequent message signaled interruption requests are converted to I/O adapter event notifications, but do not result in additional requests for I/O adapter interruptions.

公开(公告)号：HK1180793A1

公开(公告)日：2013-10-25

申请号：HK13108049

申请日：2013-07-09

Applicant: IBM

Inventor： CRADDOCK DAVID D ,  GREGG THOMAS T ,  GREINER DAN D ,  LAIS ERIC NORMAN EN

IPC: G06F20060101

Abstract: An address provided in a request issued by an adapter is converted to an address directly usable in accessing system memory. The address includes a plurality of bits, in which the plurality of bits includes a first portion of bits and a second portion of bits. The second portion of bits is used to index into one or more levels of address translation tables to perform the conversion, while the first portion of bits are ignored for the conversion. The first portion of bits are used to validate the address.