公开(公告)号：EP0772231A3

公开(公告)日：1998-09-30

申请号：EP96307629

申请日：1996-10-21

Applicant: IBM

Inventor： STAMPER ANTHONY KENDALL ,  LEBEL RICHARD JOHN ,  LANGDEAU GARY LIONEL

IPC: H01L21/205 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768

CPC classification number: H01L21/76889 ,  H01L21/28061 ,  H01L21/28518

Abstract: A method of forming low resistivity conductive lines on a semiconductor substrate is disclosed. In practicing the method a multichamber tool is used to advantage by forming a first doped polysilicon layer (14) on the surface of a substrate (12), forming a second undoped layer (16) on the doped layer (14), while maintaining the work piece under a vacuum environment, moving the substrate to a second chamber and thereafter forming a silicide containing layer (17) on the undoped polysilicon layer (16). Various techniques may be used to deposit either the polysilicon or the silicide layer such as sputtering may also be used.

公开(公告)号：DE69632375T2

公开(公告)日：2006-01-19

申请号：DE69632375

申请日：1996-10-21

Applicant: IBM

Inventor： STAMPER ANTHONY KENDALL ,  LEBEL RICHARD JOHN ,  LANGDEAU GARY LIONEL

IPC: H01L21/205 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768

Abstract: A method of forming low resistivity conductive lines on a semiconductor substrate is disclosed. In practicing the method a multichamber tool is used to advantage by forming a first doped polysilicon layer on the surface of a substrate, forming a second undoped layer on the doped layer, while maintaining the work piece under a vacuum environment, moving the substrate to a second chamber and thereafter forming a silicide containing layer on the undoped polysilicon layer. various techniques may be used to deposit either the polysilicon or the silicide layer such as sputtering may also be used. Practice of the method eliminates separation of silicide from polysilicon and increases product yield.

公开(公告)号：DE69632375D1

公开(公告)日：2004-06-09

申请号：DE69632375

申请日：1996-10-21

Applicant: IBM

Inventor： STAMPER ANTHONY KENDALL ,  LEBEL RICHARD JOHN ,  LANGDEAU GARY LIONEL

IPC: H01L21/205 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768

Abstract: A method of forming low resistivity conductive lines on a semiconductor substrate is disclosed. In practicing the method a multichamber tool is used to advantage by forming a first doped polysilicon layer on the surface of a substrate, forming a second undoped layer on the doped layer, while maintaining the work piece under a vacuum environment, moving the substrate to a second chamber and thereafter forming a silicide containing layer on the undoped polysilicon layer. various techniques may be used to deposit either the polysilicon or the silicide layer such as sputtering may also be used. Practice of the method eliminates separation of silicide from polysilicon and increases product yield.

公开(公告)号：SG55222A1

公开(公告)日：1998-12-21

申请号：SG1996010424

申请日：1996-08-02

Applicant: IBM

Inventor： STAMPER ANTHONY KENDALL ,  LEBEL RICHARD JOHN ,  LANGDEAU GARY LIONEL

IPC: H01L21/205 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768 ,  H01L21/36

Abstract: A method of forming low resistivity conductive lines on a semiconductor substrate is disclosed. In practicing the method a multichamber tool is used to advantage by forming a first doped polysilicon layer on the surface of a substrate, forming a second undoped layer on the doped layer, while maintaining the work piece under a vacuum environment, moving the substrate to a second chamber and thereafter forming a silicide containing layer on the undoped polysilicon layer. various techniques may be used to deposit either the polysilicon or the silicide layer such as sputtering may also be used. Practice of the method eliminates separation of silicide from polysilicon and increases product yield.