公开(公告)号：BR9202000A

公开(公告)日：1993-02-02

申请号：BR9202000

申请日：1992-05-27

Applicant: IBM

Inventor： LENTA JORGE EDUARDO ,  MEDFORD MITCHELL E

IPC: G06F12/16 ,  G06F11/10 ,  G06F12/04 ,  G06F12/06 ,  H01L27/10 ,  G06F15/20

公开(公告)号：IT1216132B

公开(公告)日：1990-02-22

申请号：IT1982788

申请日：1988-03-18

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LENTA JORGE EDUARDO

IPC: G06F13/28 ,  G06F13/30 ,  G06F13/36 ,  G06F13/362 ,  G06F13/374 ,  G06F

Abstract: A computer system in which peripherals greater in number than the number of DMA channels provided in the system can all have DMA access. Some of the DMA channels are dedicated to certain ones of the peripherals, while others are shared by remaining ones of the peripherals. Each peripheral having DMA access has a channel priority value. When a peripheral wants DMA access, it transmits its channel priority value onto an arbitration bus. The winning channel priority value is then compared with prestored DMA channel assignment values. If the comparison is successful, the corresponding peripheral is given a DMA channel corresponding to the DMA channel assignment value with which the comparison was successful.

公开(公告)号：AT81220T

公开(公告)日：1992-10-15

申请号：AT87118545

申请日：1987-12-15

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LENTA JORGE EDUARDO

IPC: G06F13/28 ,  G06F13/30 ,  G06F13/36 ,  G06F13/362 ,  G06F13/374

Abstract: A computer system in which peripherals greater in number than the number of DMA channels provided in the system can all have DMA access. Some of the DMA channels are dedicated to certain ones of the peripherals, while others are shared by remaining ones of the peripherals. Each peripheral having DMA access has a channel priority value. When a peripheral wants DMA access, it transmits its channel priority value onto an arbitration bus. The winning channel priority value is then compared with prestored DMA channel assignment values. If the comparison is successful, the corresponding peripheral is given a DMA channel corresponding to the DMA channel assignment value with which the comparison was successful.

公开(公告)号：AT75865T

公开(公告)日：1992-05-15

申请号：AT87118542

申请日：1987-12-15

Applicant: IBM

Inventor： CONCILIO IAN ANTHONY ,  HAWTHORNE JEFFREY ALAN ,  HEATH CHESTER ASBURY ,  LENTA JORGE EDUARDO ,  NGUYEN LONG DUY

IPC: G06F13/28 ,  G06F13/30 ,  G06F13/36 ,  G06F13/362 ,  G06F13/374

Abstract: A computer system is coupled to peripherals having their own DMA channel arbiter and peripherals having no arbiter. A separate arbitration unit, controlled directly by the CPU, is provided to arbitrate on behalf of peripherals having no arbiter. The CPU can thus freely assign different arbitration levels to such peripherals, and can instruct the arbitration unit to simultaneously arbitrate on different arbitration levels or for two or more DMA channels.

公开(公告)号：BE1001290A4

公开(公告)日：1989-09-19

申请号：BE8701396

申请日：1987-12-04

Applicant: IBM

Inventor： CONCILIO IAN A ,  HAWTHORNE JEFFREY A ,  HEATH CHESTER ASBURY ,  LENTA JORGE EDUARDO ,  NGUYEN LONG D

IPC: G06F13/28 ,  G06F13/30 ,  G06F13/36 ,  G06F13/362 ,  G06F13/374

Abstract: Dans un système d'ordinateur ayant à la fois des unités périphériques comportant leur propre système d'arbitrage d'accès à un canal DMA et des unités périphériques n'ayant pas de système propre d'arbitrage, une unité d'arbitrage séparée commandée directement par l'unité CPU permet d'arbitrer les unités périphériques n'ayant pas de système d'arbitrage. L'unité CPU peut ainsi attribuer librement différents niveaux d'arbitrage à ces unités périphériques et peut indiquer à l'unité d'arbitrage qu'elle doit arbitrer simultanément à des niveaux d'arbitrage différents ou pour deux canaux DMA ou plus.

公开(公告)号：GB2202977A

公开(公告)日：1988-10-05

申请号：GB8728927

申请日：1987-12-10

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LENTA JORGE EDUARDO

IPC: G06F13/28 ,  G06F13/30 ,  G06F13/36 ,  G06F13/362 ,  G06F13/374

Abstract: A computer system in which peripherals greater in number than the number of DMA channels provided in the system can all have DMA access. Some of the DMA channels are dedicated to certain ones of the peripherals, while others are shared by remaining ones of the peripherals. Each peripheral having DMA access has a channel priority value. When a peripheral wants DMA access, it transmits its channel priority value onto an arbitration bus. The winning channel priority value is then compared with prestored DMA channel assignment values. If the comparison is successful, the corresponding peripheral is given a DMA channel corresponding to the DMA channel assignment value with which the comparison was successful.

公开(公告)号：DE3782045D1

公开(公告)日：1992-11-05

申请号：DE3782045

申请日：1987-12-15

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LENTA JORGE EDUARDO

IPC: G06F13/28 ,  G06F13/30 ,  G06F13/36 ,  G06F13/362 ,  G06F13/374

Abstract: A computer system in which peripherals greater in number than the number of DMA channels provided in the system can all have DMA access. Some of the DMA channels are dedicated to certain ones of the peripherals, while others are shared by remaining ones of the peripherals. Each peripheral having DMA access has a channel priority value. When a peripheral wants DMA access, it transmits its channel priority value onto an arbitration bus. The winning channel priority value is then compared with prestored DMA channel assignment values. If the comparison is successful, the corresponding peripheral is given a DMA channel corresponding to the DMA channel assignment value with which the comparison was successful.

公开(公告)号：HK65392A

公开(公告)日：1992-09-11

申请号：HK65392

申请日：1992-09-03

Applicant: IBM

Inventor： CONCILIO IAN ANTHONY ,  HAWTHORNE JEFFREY ALAN ,  HEATH CHESTER ASBURY ,  LENTA JORGE EDUARDO ,  NGUYEN LONG DUY

IPC: G06F13/30 ,  G06F13/28 ,  G06F13/36 ,  G06F13/362 ,  G06F13/374

Abstract: A computer system is coupled to peripherals having their own DMA channel arbiter and peripherals having no arbiter. A separate arbitration unit, controlled directly by the CPU, is provided to arbitrate on behalf of peripherals having no arbiter. The CPU can thus freely assign different arbitration levels to such peripherals, and can instruct the arbitration unit to simultaneously arbitrate on different arbitration levels or for two or more DMA channels.

公开(公告)号：DE3778877D1

公开(公告)日：1992-06-11

申请号：DE3778877

申请日：1987-12-15

Applicant: IBM

Inventor： CONCILIO IAN ANTHONY ,  HAWTHORNE JEFFREY ALAN ,  HEATH CHESTER ASBURY ,  LENTA JORGE EDUARDO ,  NGUYEN LONG DUY

IPC: G06F13/28 ,  G06F13/30 ,  G06F13/36 ,  G06F13/362 ,  G06F13/374

Abstract: A computer system is coupled to peripherals having their own DMA channel arbiter and peripherals having no arbiter. A separate arbitration unit, controlled directly by the CPU, is provided to arbitrate on behalf of peripherals having no arbiter. The CPU can thus freely assign different arbitration levels to such peripherals, and can instruct the arbitration unit to simultaneously arbitrate on different arbitration levels or for two or more DMA channels.

公开(公告)号：BE1000819A3

公开(公告)日：1989-04-11

申请号：BE8701395

申请日：1987-12-04

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LENTA JORGE EDUARDO

IPC: G06F13/28 ,  G06F13/30 ,  G06F13/36 ,  G06F13/362 ,  G06F13/374

Abstract: Système d'ordinateur dans lequel des unités périphériques dans un nombre supérieur au nombre des canaux DMA prévus dans le système, peuvent toutes bénéficier de l'accès DMA, certains des canaux DMA étant attribués à certaines des unités périphériques tandis que d'autres appelés canaux DMA ''programmables'', étant partagés entre le reste des unités périphériques.