DATA PROCESSING SYSTEM AND ADAPTER CARD

    公开(公告)号:MY134225A

    公开(公告)日:2007-11-30

    申请号:MYPI9300432

    申请日:1988-02-15

    Applicant: IBM

    Abstract: A DATA PROCESSING SYSTEM INCLUDES A PLANAR BOARD HAVING A CENTRAL PROCESSING UNIT (CPU), A MAIN MEMORY UNIT, AND INPUT /OUTPUT (I/O) SOCKETS OR SLOTS, EACH ADAPTED TO RECEIVE A SELECTED ONE OF A PLURALITY OF DIFFERENT AND/ OR SIMILAR OPTION CARDS. EACH CARD CONTAINS (OR IS CONNECTED TO) AND CONTROLS A RESPECTIVE PERIPHERAL DEVICE ; AND EACH CARD IS PRE-WIRED WITH AN ID VALUE CORRESPONDING TO ITS CARD TYPE. SOFTWARE PROGRAMMABLE OPTION REGISTERS ON EACH CARD STORE PARAMETERS SUCH AS DESIGNATED DEFAULT (OR ALTERNATE) ADDRESS INFORMATION, PRIORITY LEVELS, AND OTHER SYSTEM RESOURCE PARAMETERS. SETUP ROUTINE, DURING INITIAL POWER-ON, RETRIEVES AND STORES THE APPROPRIATE PARAMETERS IN THE I/O CARDS AND ALSO IN SLOT POSITIONS IN MAIN MEMORY, ONE POSITION BEING ASSIGNED TO EACH SLOT ON THE BOARD. EACH SLOT POSITION IS ADAPTED TO HOLD THE PARAMETERS ASSOCIATED WITH THE CARD INSERTED IN ITS RESPECTIVE SLOT AND THE CARD ID VALUE. THAT PORTION OF MAIN MEMORY CONTAINING THE SLOT POSITIONS IS ADAPTED TO MAINTAIN THE PARAMETER AND ID INFORMATION BY MEANS OF BATTERY POWER WHEN SYSTEM POWER FAILS OR IS DISCONNECTED, I.E., A NONVOLATILE MEMORY PORTION. SUBSEQUENT TRANSFERRING PARAMETERS FROM THE TABLE TO THE CARD OPTION REGISTERS IF THE STATUS OF ALL THE SLOTS HAS NOT NOT CHANGED SINCE THE LAST POWER-DOWN, SYSTEM RESET, OR CHANNEL RESET.

    Data processing system with pluggable option card

    公开(公告)号:HK1004298A1

    公开(公告)日:1998-11-20

    申请号:HK98103444

    申请日:1998-04-24

    Applicant: IBM

    Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.

    3.
    发明专利
    未知

    公开(公告)号:NO175879C

    公开(公告)日:1994-12-21

    申请号:NO880605

    申请日:1988-02-11

    Applicant: IBM

    Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.

    4.
    发明专利
    未知

    公开(公告)号:AT90162T

    公开(公告)日:1993-06-15

    申请号:AT88103609

    申请日:1988-03-08

    Applicant: IBM

    Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.

    5.
    发明专利
    未知

    公开(公告)号:IT1216132B

    公开(公告)日:1990-02-22

    申请号:IT1982788

    申请日:1988-03-18

    Applicant: IBM

    Abstract: A computer system in which peripherals greater in number than the number of DMA channels provided in the system can all have DMA access. Some of the DMA channels are dedicated to certain ones of the peripherals, while others are shared by remaining ones of the peripherals. Each peripheral having DMA access has a channel priority value. When a peripheral wants DMA access, it transmits its channel priority value onto an arbitration bus. The winning channel priority value is then compared with prestored DMA channel assignment values. If the comparison is successful, the corresponding peripheral is given a DMA channel corresponding to the DMA channel assignment value with which the comparison was successful.

    SELECTEUR PROGRAMMABLE D'OPTIONS.

    公开(公告)号:BE1001459A3

    公开(公告)日:1989-11-07

    申请号:BE8800026

    申请日:1988-01-11

    Applicant: IBM

    Abstract: Méthode utilisée dans un système de traitement de données dans lequel des données opérationnelles sont récupérées et/ou crées à la mise sous tension initiale pour chaune de plusieurs cartes comprenant l'établissement d'une mémoire non volatile pour emmagasiner les données opérationnelles lorsque l'alimentation du système est coupée, la détermination à la montée en puissance ultérieure, du fait que les données opérationnelles dans la mémoire non volatile sont toujours valides pour toutes les cartes connectées au système, et le transfert des données opérationnlles valides de la mémoire non volatile aux cartes respectives.

    7.
    发明专利
    未知

    公开(公告)号:DE3809831A1

    公开(公告)日:1988-10-06

    申请号:DE3809831

    申请日:1988-03-23

    Applicant: IBM

    Abstract: A personal computer system with associated interrupt controller is preferably designed to operate with programs and respond to interrupt related commands in one mode, such as level sensitive mode, but is provided with circuitry that enables the system to convert and respond to interrupt-related software commands in another mode, such as edge sensitive (triggered) mode, the system then treating the edge mode signals just as if they were level mode signals.

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