公开(公告)号：JPH11328968A

公开(公告)日：1999-11-30

申请号：JP13968098

申请日：1998-05-21

Applicant: IBM

Inventor： LINDNER HEINRICH ,  KNOTT PETER ,  WAGNER OTTO

IPC: G11C11/41

Abstract: PROBLEM TO BE SOLVED: To provide a memory which enables high-speed write through operation by combining density and speed of a usual single port memory cell with possibility of performing a readout access and an independent write access in a same cycle. SOLUTION: A virtual two-port memory uses a single port memory cell 200. A comparison means 260 compares a read-out address AR with a write address AW. A means 270 for writing a data from a data entry terminal 250 in a cell 200 bypasses the data also to a data output terminal 280 so that the write through operation may be enabled when the readout address AR matches the write address AW.

公开(公告)号：JPH11176167A

公开(公告)日：1999-07-02

申请号：JP2877598

申请日：1998-02-10

Applicant: IBM

Inventor： LINDNER HEINRICH ,  KNOTT PETER ,  WAGNER OTTO

IPC: G11C11/41 ,  G06F12/00 ,  G11C8/16

Abstract: PROBLEM TO BE SOLVED: To provide a memory by which a high-speed write-through operation can be performed by a method wherein the density and the speed of an ordinary single-port memory cell are coupled to a possibility that a read access operation and a write access operation are executed in the same cycle. SOLUTION: A virtual two-port memory uses a single-port memory cell 200. A meand 260 for comparison compares a read address AR with a write address AW. A means 270 by which data is written into the cell 200 from a data input terminal 250 by-passes the data also to a data output terminal 280 in such a way that, when the read address AR agrees with the write address AW, a write-through operation is enabled.