VIRTUAL TWO-PORT MEMORY FOR HIGH-SPEED WRITE THROUGH OPERATION

    公开(公告)号:JPH11328968A

    公开(公告)日:1999-11-30

    申请号:JP13968098

    申请日:1998-05-21

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide a memory which enables high-speed write through operation by combining density and speed of a usual single port memory cell with possibility of performing a readout access and an independent write access in a same cycle. SOLUTION: A virtual two-port memory uses a single port memory cell 200. A comparison means 260 compares a read-out address AR with a write address AW. A means 270 for writing a data from a data entry terminal 250 in a cell 200 bypasses the data also to a data output terminal 280 so that the write through operation may be enabled when the readout address AR matches the write address AW.

    VIRTUAL TWO PORT-MEMORY FOR HIGH-SPEED WRITE-THROUGH OPERATION

    公开(公告)号:JPH11176167A

    公开(公告)日:1999-07-02

    申请号:JP2877598

    申请日:1998-02-10

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide a memory by which a high-speed write-through operation can be performed by a method wherein the density and the speed of an ordinary single-port memory cell are coupled to a possibility that a read access operation and a write access operation are executed in the same cycle. SOLUTION: A virtual two-port memory uses a single-port memory cell 200. A meand 260 for comparison compares a read address AR with a write address AW. A means 270 by which data is written into the cell 200 from a data input terminal 250 by-passes the data also to a data output terminal 280 in such a way that, when the read address AR agrees with the write address AW, a write-through operation is enabled.

    METHOD FOR THE DIGITAL SLOPE CONTROL OF THE OUTPUT SIGNALS OF POWER AMPLIFIERS OF SEMICONDUCTOR CHIPS WITH VLSI CIRCUITS FOR A COMPUTER

    公开(公告)号:CA1261011A

    公开(公告)日:1989-09-26

    申请号:CA548403

    申请日:1987-10-01

    Applicant: IBM

    Abstract: METHOD FOR THE DIGITAL SLOPE CONTROL OF THE OUTPUT SIGNALS OF POWER AMPLIFIERS OF SEMICONDUCTOR CHIPS WITH VLSI CIRCUITS FOR A COMPUTER A method for the digital slope control of the output signals of power amplifiers, as well as a power amplifier suitable for carrying out the method are described. One way of representing the actual slope value is via the number of clock pulses applied to a counter (10) during a measuring interval which depends in its duration on the slope. Such a measuring interval is produced by applying the pulses of a ring oscillator (1) containing one of the power amplifiers (2) to another counter (9) until the overflow of the latter. Another mode of representing the actual slope value consists in counting the number of pulses of the ring oscillator (1) during a measuring interval of predetermined duration. Actual and nominal values of the slope are compared. The results of this comparison change the contents of a left/right-shift register (19). Its parallel outputs (21) influence via control line (22) control inputs (23) of the power amplifiers in order to alter their slope by switching on or off output transistors arranged in parallel with respect to their switching paths.

    5.
    发明专利
    未知

    公开(公告)号:BR8705233A

    公开(公告)日:1988-05-24

    申请号:BR8705233

    申请日:1987-10-02

    Applicant: IBM

    Abstract: A method for the digital slope control of the output signals of power amplifiers, as well as a power amplifier suitable for carrying out the method as described. One way of representing the actual slope value is via the number of clock pulses applied to a counter during a measuring interval which depends in its duration on the slope. Such a measuring interval is produced by applying the pulses of a ring oscillator containing one of the power amplifiers to another counter until the overflow of the latter. Another mode of representing the actual slope value consists in counting the number of pulses of the ring oscillator during a measuring interval of predetermined duration. Actual and nominal values of the slope are compared. The results of this comparison change the contents of a left/right-shift register. Its parallel outputs influence, via control lines, control inputs of the power amplifiers in order to alter their slope by switching on or off output transistors arranged in parallel with respect to their switching paths.

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