公开(公告)号：US3906254A

公开(公告)日：1975-09-16

申请号：US49494674

申请日：1974-08-05

Applicant: IBM

Inventor： LANE RALPH D ,  MANNING RICHARD A

IPC: H03K19/0185 ,  H03K19/08 ,  H03K3/353 ,  H03K17/60

CPC classification number: H03K19/018521

Abstract: An interfacing circuit for restoring voltage pulses to a desired fixed level. The circuit is particularly adapted to CMOS technology and includes features which result in rapid output rise and fall times, latching of the output voltage level, and isolation of the input following transition of the input voltage between its respective final levels. The circuit is also relatively insensitive to noise since it requires voltage transitions greater than the FET threshold levels to fully activate and switch the latching circuit means.

Abstract translation: 一种用于将电压脉冲恢复到所需固定电平的接口电路。 该电路特别适用于CMOS技术，并且包括导致快速输出上升和下降时间，输出电压电平锁存以及输入电压在各自的最终电平转换之后的隔离的特征。 该电路对噪声也相对不敏感，因为它需要大于FET阈值电平的电压转换，以完全启动和切换锁存电路装置。

公开(公告)号：FR2305825A1

公开(公告)日：1976-10-22

申请号：FR7603003

申请日：1976-01-29

Applicant: IBM

Inventor： LANE RALPH D ,  MANNING RICHARD A

IPC: G11C11/411 ,  G11C15/04