-
公开(公告)号：DE69012954T2
公开(公告)日：1995-04-06
申请号：DE69012954
申请日：1990-10-09
Applicant: IBM
IPC: G01R31/28 , G01R31/00 , G06F11/16 , G06F11/22 , G06F11/267 , G01R31/3177
Abstract: A method and apparatus for identifying stuck faults in an oscillator used for providing a oscillator input signal (12) to an integrated circuit chip of the type conforming to a Level Sensitive Scan Design (LSSD) system and testing technique. A pair of shift register latches (SRLs) (20,30) are provided in the integrated circuit chip having a logical one signal applied to a data input of the SRLs. The oscillator input signal is applied to a data clock input of a first one (20) of the SRLs and an inverted oscillator input signal is applied to the data clock input of a second one (30) of the SRLs. Then the scan data output (SDO) of the test SRLs is detected responsive to the applied oscillator and inverted oscillator input signals to identify a stuck fault.
-
公开(公告)号：DE69012954D1
公开(公告)日：1994-11-03
申请号：DE69012954
申请日：1990-10-09
Applicant: IBM
IPC: G01R31/28 , G01R31/00 , G06F11/16 , G06F11/22 , G06F11/267 , G01R31/318
Abstract: A method and apparatus for identifying stuck faults in an oscillator used for providing a oscillator input signal (12) to an integrated circuit chip of the type conforming to a Level Sensitive Scan Design (LSSD) system and testing technique. A pair of shift register latches (SRLs) (20,30) are provided in the integrated circuit chip having a logical one signal applied to a data input of the SRLs. The oscillator input signal is applied to a data clock input of a first one (20) of the SRLs and an inverted oscillator input signal is applied to the data clock input of a second one (30) of the SRLs. Then the scan data output (SDO) of the test SRLs is detected responsive to the applied oscillator and inverted oscillator input signals to identify a stuck fault.
-
Search Results
2
records
(took 0.015 seconds)
