公开(公告)号：DE69316810D1

公开(公告)日：1998-03-12

申请号：DE69316810

申请日：1993-07-16

Applicant: IBM

Inventor： BURGHARTZ JOACHIM N ,  MEYERSON BERNARD ,  SUN YAUN-CHEN

IPC: H01L29/78 ,  H01L21/336 ,  H01L29/786 ,  H01L29/772

Abstract: A dual gate thin film or SOI MOSFET device having a sufficiently thin body thickness with one or more semiconductor channel layer(s) sandwiched by semiconductor layers having a different energy band structure to automatically confine carriers to the channel layer(s) without the need for channel grading or modulation doping. Preferred embodiments employ strained layer epitaxy having Si/SiGe/Si or SiGe/Si/SiGe semiconductor layers. The SiGe Thin Film Transistor (100) has a SiGe channel (102), sandwiched between two thin Si layers (104, 106). The top Si layer (104) is also called a top channel or first spacer layer, and the bottom Si layer (106) is also called a substrate channel or second spacer layer. A pair of top and bottom gate electrodes (108, 110) are used to modulate carriers in the channel and thereby turn the transistor on and off in a known fashion. High quality silicon dioxide (SiO2) gate insulators (112, 114) can be deposited or thermally grown thereon. High conductivity source and drain regions (116, 118), are also provided. Connection to, and biasing of, the gates, and the source/drain regions are performed in a conventional manner.

公开(公告)号：DE69316810T2

公开(公告)日：1998-08-13

申请号：DE69316810

申请日：1993-07-16

Applicant: IBM

Inventor： BURGHARTZ JOACHIM N ,  MEYERSON BERNARD ,  SUN YAUN-CHEN

IPC: H01L29/78 ,  H01L21/336 ,  H01L29/786 ,  H01L29/772

Abstract: A dual gate thin film or SOI MOSFET device having a sufficiently thin body thickness with one or more semiconductor channel layer(s) sandwiched by semiconductor layers having a different energy band structure to automatically confine carriers to the channel layer(s) without the need for channel grading or modulation doping. Preferred embodiments employ strained layer epitaxy having Si/SiGe/Si or SiGe/Si/SiGe semiconductor layers. The SiGe Thin Film Transistor (100) has a SiGe channel (102), sandwiched between two thin Si layers (104, 106). The top Si layer (104) is also called a top channel or first spacer layer, and the bottom Si layer (106) is also called a substrate channel or second spacer layer. A pair of top and bottom gate electrodes (108, 110) are used to modulate carriers in the channel and thereby turn the transistor on and off in a known fashion. High quality silicon dioxide (SiO2) gate insulators (112, 114) can be deposited or thermally grown thereon. High conductivity source and drain regions (116, 118), are also provided. Connection to, and biasing of, the gates, and the source/drain regions are performed in a conventional manner.