公开(公告)号：BR8004022A

公开(公告)日：1981-01-21

申请号：BR8004022

申请日：1980-06-26

Applicant: IBM

Inventor： ROMANKIW L ,  MIERSCH E

IPC: H05K1/05 ,  H01L21/60 ,  H01L23/12 ,  H01L23/14 ,  H01L23/52 ,  H01L23/538 ,  H05K1/11 ,  H05K3/32 ,  H05K3/46 ,  H01L25/00

Abstract: The board includes two parallel power plates (10, 11) separated by a dielectric layer (not shown). The plates (10, 11) are comprised of two mating metal sheets and are each provided with integral conductive pads (42, 40) and openings (41, 43). After assembly of the two plates (10, 11) and interleaved dielectric layer (not shown), each pad (40, 42) on the two plates is inserted into the coaxial opening (41, 43) in the opposite plate so as to form on the outside surfaces of the two plates (10, 11) areas comprising connection terminals for connecting LSI chips. Each of these area is insulated from the coplanar surrounding metal plate area by the dielectric layer (not shown).