公开(公告)号：WO2010063769A3

公开(公告)日：2010-11-18

申请号：PCT/EP2009066257

申请日：2009-12-02

Applicant: IBM ,  IBM UK ,  MADRUGA JOAQUIN ,  MINOR BARRY ,  NUTTER MARK RICHARD

Inventor： MADRUGA JOAQUIN ,  MINOR BARRY ,  NUTTER MARK RICHARD

IPC: H04L29/08

CPC classification number: G06T1/20 ,  G06T15/005 ,  G06T2210/52 ,  G09G2352/00 ,  H04L67/1002 ,  H04L67/1023 ,  H04L67/36 ,  H04L67/42

Abstract: A graphics client receives a frame, the frame comprising scene model data. A server load balancing factor and a prospective rendering factor is set. The frame is partitioned into a plurality of server bands based on the server load balancing factor and the prospective rendering factor. The server bands are distributed to a plurality of compute servers. Processed server bands are received from the compute servers. A processed frame is assembled based on the received processed server bands. The processed frame is transmitted for display to a user as an image.

Abstract translation: 图形客户端接收帧，该帧包括场景模型数据。 设置服务器负载平衡因子和预期呈现因子。 基于服务器负载平衡因子和预期呈现因子，将帧分割成多个服务器频带。 服务器频带被分配给多个计算服务器。 从计算服务器接收处理的服务器频段。 基于接收到的处理后的服务器频段来组合已处理的帧。 处理后的帧作为图像发送给用户显示给用户。

公开(公告)号：WO2007085522A3

公开(公告)日：2008-06-26

申请号：PCT/EP2007050182

申请日：2007-01-09

Applicant: IBM ,  IBM UK ,  BROKENSHIRE DANIEL ALAN ,  JOHNS CHARLES RAY ,  MINOR BARRY ,  NUTTER MARK RICHARD

Inventor： BROKENSHIRE DANIEL ALAN ,  JOHNS CHARLES RAY ,  MINOR BARRY ,  NUTTER MARK RICHARD

IPC: G06F15/167

CPC classification number: G06F15/17337

Abstract: An apparatus and method for efficient communication of producer/consumer buffer status are provided. With the apparatus and method, devices in a data processing system notify each other of updates to head and tail pointers of a shared buffer region when the devices perform operations on the shared buffer region using signal notification channels of the devices. Thus, when a producer device that produces data to the shared buffer region writes data to the shared buffer region, an update to the head pointer is written to a signal notification channel of a consumer device. When a consumer device reads data from the shared buffer region, the consumer device writes a tail pointer update to a signal notification channel of the producer device. In addition, channels may operate in a blocking mode so that the corresponding device is kept in a low power state until an update is received over the channel.

Abstract translation: 提供了用于生产者/消费者缓冲器状态的有效通信的装置和方法。 利用该设备和方法，当设备使用设备的信号通知通道在共享缓冲区域上执行操作时，数据处理系统中的设备通知彼此对共享缓冲区域的头和尾指针的更新。 因此，当向共享缓冲区域产生数据的生成器设备将数据写入到共享缓冲区域时，对头指针的更新被写入消费者设备的信号通知通道。 当消费者设备从共享缓冲区域读取数据时，消费者设备将尾指针更新写入生成器设备的信号通知通道。 此外，信道可以以阻塞模式操作，使得对应的设备保持在低功率状态，直到通过信道接收到更新。

公开(公告)号：WO2011080055A3

公开(公告)日：2011-09-09

申请号：PCT/EP2010069508

申请日：2010-12-13

Applicant: IBM ,  IBM UK ,  BELLOWS GREGORY HOWARD ,  MADRUGA JOAQUIN ,  MINOR BARRY ,  HORTON BRIAN

Inventor： BELLOWS GREGORY HOWARD ,  MADRUGA JOAQUIN ,  MINOR BARRY ,  HORTON BRIAN

IPC: G06F9/45 ,  G06F9/48 ,  G06F9/50

CPC classification number: G06F9/5066 ,  G06F9/4843

Abstract: A method provides efficient dispatch/completion of an N Dimensional (ND) Range command in a data processing system (DPS). The method comprises: a compiler generating one or more commands from received program instructions; ND Range work processing (WP) logic determining when a command generated by the compiler will be implemented over an ND configuration of operands, where N is greater than one (1); automatically decomposing the ND configuration of operands into a one (1) dimension (1D) work element comprising P sequentially ordered work items that each represent one of the operands; placing the 1D work element within a command queue of the DPS; enabling sequential dispatching of 1D work items in ordered sequence from to one or more processing units; and generating an ND Range output by mapping the 1D work output result to an ND position corresponding to an original location of the operand represented by the 1D work item.

Abstract translation: 一种方法在数据处理系统（DPS）中提供N维（ND）范围命令的有效调度/完成。 该方法包括：编译器从接收的程序指令生成一个或多个命令; ND范围工作处理（WP）逻辑确定编译器生成的命令何时将通过操作数的ND配置来实现，其中N大于1（1）; 将所述操作数的ND配置自动分解为一（1）维（1D）工作元素，其包括每个表示所述操作数之一的P个顺序排列的工作项; 将1D工作元素放置在DPS的命令队列中; 使1D工作项目从有序序列顺序排列到一个或多个处理单元; 并通过将1D工作输出结果映射到与由1D工作项表示的操作数的原始位置相对应的ND位置来生成ND范围输出。

公开(公告)号：GB2356114A

公开(公告)日：2001-05-09

申请号：GB0015421

申请日：2000-06-26

Applicant: IBM

Inventor： CHELSTOWSKI ILIESE CLAIRE ,  JOHNS CHARLES RAY ,  MINOR BARRY ,  WHITE JNR GEORGE LEOPOLD

IPC: G06T7/20 ,  G06T13/20 ,  G09G5/38 ,  G06T15/00

Abstract: A method for displaying a three-dimensional scene in which some objects are blurred because of motion comprises the steps of categorising the objects in a scene into two sets, a first set containing objects to be blurred and a second set containing objects not to be blurred. The first set of objects is rendered directly to a first buffer, the render time period is then divided into a plurality of time slices and for each time slice each object in the second set is rendered to the first buffer, a scene is accumulated from the first buffer to an accumulation buffer to be displayed. Thus, static objects (non-blurred) are rendered only once and moving objects (blurred) are rendered over a series of time slices. Preferably the categorising step includes determining if a motion vector is associated with an object.

公开(公告)号：CA2618472A1

公开(公告)日：2007-02-15

申请号：CA2618472

申请日：2006-07-26

Applicant: IBM

Inventor： MINOR BARRY ,  FOSSUM GORDON CLYDE ,  TO VANDUNG DANG

IPC: G06T15/06 ,  G06T15/08 ,  G06T15/40

Abstract: A system and method for generating an image that includes ray traced pixel data and rasterized pixel data is presented. A synergistic processing unit (SPU) uses a rendering algorithm to generate ray traced data for objects tha t require high-quality image rendering. The ray traced data is fragmented, whereby each fragment includes a ray traced pixel depth value and a ray trac ed pixel color value. A rasterizer compares ray traced pixel depth values to corresponding rasterized pixel depth values, and overwrites ray traced pixel data with rasterized pixel data when the corresponding rasterized fragment i s "closer" to a viewing point, which results in composite data. A display subsystem uses the resultant composite data to generate an image on a user's display.

公开(公告)号：DE112010004083T5

公开(公告)日：2012-10-11

申请号：DE112010004083

申请日：2010-12-09

Applicant: IBM

Inventor： MADRUGA JOAQUIN ,  BELLOWS GREGORY HOWARD ,  MINOR BARRY ,  MIKOSH ROSS ANTHONY

IPC: G06F12/08 ,  G06F9/50

Abstract: Ein Datenverarbeitungssystem enthält mehrere Prozessorkerne oder ist mit diesen verbunden. Jedes von mehreren Speicherobjekten kann mit Arbeitsobjekten bestückt werden und kann Attributen zugeordnet sein, die Informationen enthalten können, die verwendet werden können, um Daten jedes Speicherobjekts zu beschreiben und/oder die verwendet werden können, um Daten jedes Speicherobjekts zu verarbeiten. Die Attribute können verwendet werden, um u. a. eine Cache-Speicher-Richtlinie und/oder eine Cache-Speicher-Größe und/oder eine Zeilengröße eines Cache-Speichers anzugeben. In einer oder mehreren Ausführungsformen können die Attribute als eine historische Angabe wie jedes Speicherobjekt verwendet wird, verwendet werden. Die Attribute können verwendet werden, um historische statistische Angaben des Cache-Speichers (z. B. eine Trefferrate, eine Verfehlrate usw.) anzugeben.

公开(公告)号：GB2488691A

公开(公告)日：2012-09-05

申请号：GB201208609

申请日：2010-12-09

Applicant: IBM

Inventor： MADRUGA JOAQUIN ,  BELLOWS GREGORY HOWARD ,  MINOR BARRY ,  MIKOSH ROSS ANTHONY

IPC: G06F12/08

Abstract: A data processing system includes or is coupled to multiple processor cores. Each of multiple memory objects can be populated with work items and can be associated with attributes that can include information which can be used to describe data of each memory object and/or which can be used to process data of each memory object. The attributes can be used to indicate one or more of a cache policy, a cache size, and a cache line size, among others. In one or more embodiments, the attributes can be used as a history of how each memory object is used. The attributes can be used to indicate cache history statistics (e.g., a hit rate, a miss rate, etc.).

公开(公告)号：DE112010004013T5

公开(公告)日：2012-11-15

申请号：DE112010004013

申请日：2010-12-06

Applicant: IBM

Inventor： MADRUGA JOAQUIN ,  MINOR BARRY ,  BELLOWS GREGORY HOWARD ,  ALEXANDER BENJAMIN GALE

IPC: G06F11/07

Abstract: Offengelegt werden ein Verfahren, ein System und ein Computerprogrammprodukt zum Betreiben eines Datenverarbeitungssystems, das mehrere Prozessorkerne enthalten oder mit mehreren Prozessorkernen verbunden sein kann. Bei einer oder mehreren bevorzugten Ausführungsformen der vorliegenden Erfindung kann ein Fehler festgestellt werden, während zwei oder mehrere Prozessorkerne eine aus zwei oder mehreren Arbeitseinheiten bestehende erste Gruppe verarbeiten, und der Fehler kann einer Anwendung durch ein Signal angezeigt werden. Die Anwendung kann einen Fortschrittszustand bei der Verarbeitung der zwei oder mehreren Arbeitseinheiten und mindestens eine Abhängigkeit von dem Fortschrittszustand feststellen. Bei einer oder mehreren bevorzugten Ausführungsformen der vorliegenden Erfindung kann die Terminierung einer zweiten Gruppe, die aus zwei oder mehreren Arbeitseinheiten besteht, welche zur Verarbeitung eingeplant sind, als Reaktion auf die Feststellung des Fehlers aufgehoben werden. Bei einer oder mehreren bevorzugten Ausführungsformen der vorliegenden Erfindung kann die Anwendung mindestens eine Arbeitseinheit, die den Fehler verursacht hat, verarbeiten, und die aus zwei oder mehreren Arbeitseinheiten bestehende zweite Gruppe kann zur Verarbeitung neu eingeplant werden.

公开(公告)号：GB2488884A

公开(公告)日：2012-09-12

申请号：GB201203861

申请日：2010-12-06

Applicant: IBM

Inventor： BELLOWS GREGORY HOWARD ,  MADRUGA JOAQUIN ,  ALEXANDER BENJAMIN GALE ,  MINOR BARRY

IPC: G06F11/07

Abstract: Disclosed are a method, a system and a computer program product of operating a data processing system that can include or be coupled to multiple processor cores. In one or more preferred embodiments of the present invention, an error can be determined while two or more processor cores are processing a first group of two or more work items, and the error can be signaled to an application. The application can determine a state of progress of processing the two or more work items and at least one dependency from the state of progress. In one or more preferred embodiments of the present invention, a second group of two or more work items that are scheduled for processing can be unscheduled, in response to determining the error. In one or more preferred embodiments of the present invention, the application can process at least one work item that caused the error, and the second group of two or more work items can be rescheduled for processing.

公开(公告)号：GB2356114B

公开(公告)日：2003-09-10

申请号：GB0015421

申请日：2000-06-26

Applicant: IBM

Inventor： CHELSTOWSKI ILIESE CLAIRE ,  JOHNS CHARLES RAY ,  MINOR BARRY ,  WHITE JNR GEORGE LEOPOLD

IPC: G06T7/20 ,  G06T13/20 ,  G09G5/38 ,  G06T15/00