公开(公告)号：DE3884665T2

公开(公告)日：1994-05-11

申请号：DE3884665

申请日：1988-03-25

Applicant: IBM

Inventor： MONKOWSKI MICHAEL DANIEL ,  SHEPARD JOSEPH FRANCIS

IPC: H01L29/73 ,  H01L21/331 ,  H01L21/60 ,  H01L29/417 ,  H01L29/423 ,  H01L29/732 ,  H01L29/08

Abstract: A novel vertical bipolar device endowed with a lithography-independent tightly controlled sub-micron-wide emitter. In one embodiment, the emitter (114),is contacted by a self-aligned conductive sidewall (112), linked up to a horizontal conductive link (102). The extrinsic base (116, 120), embedded within the collector (14), is recessed below and laterally spaced from the emitter by an insulator layer (118), formed on the emitter sidewall. Transistor action is confined to the small emitter within the intrinsic base, the latter being contiguous with the extrinsic base. The base is contacted by means of a conductive self-aligned silicide (122), formed on the extrinsic base. In a second embodiment, the emitter is of a desired shape with a correspondingly shaped contacting sidewall and pad integral structure. In all embodiments, electrical contact to emitter is established at a distance laterally away from the transistor action area. A novel process of forming vertical (e.g. NPN) bipolar device in which starting with a substrate having an N type epitaxial collector region, a horizontal layer composed of oxide-polysilicon dual layer with a substantially vertical surface is formed. P type intrinsic base precursor is formed in a surface portion of the collector. A submicron-wide sidewall of N doped polysilcon is established on the sidewall. By RIE, a surface portion of the exposed intrinsic base is removed to recess the would-be extrinsic base. An oxide insulator is formed on the sidewall by thermal oxidation and RIE, while simulta- neously driving dopant from the sidewall into the intrinsic base thereunder, thereby forming the emitter with self-aligned polysilicon sidewall contact and delineating the intrinsic base. Extrin-sic base is implanted into the exposed recessed intrinsic base. A self-aligned silicide layer is formed on the extrinsic base as also on the horizon- tal polysilicon layer linked with the sidewall.

公开(公告)号：DE3884665D1

公开(公告)日：1993-11-11

申请号：DE3884665

申请日：1988-03-25

Applicant: IBM

Inventor： MONKOWSKI MICHAEL DANIEL ,  SHEPARD JOSEPH FRANCIS

IPC: H01L29/73 ,  H01L21/331 ,  H01L21/60 ,  H01L29/417 ,  H01L29/423 ,  H01L29/732 ,  H01L29/08

Abstract: A novel vertical bipolar device endowed with a lithography-independent tightly controlled sub-micron-wide emitter. In one embodiment, the emitter (114),is contacted by a self-aligned conductive sidewall (112), linked up to a horizontal conductive link (102). The extrinsic base (116, 120), embedded within the collector (14), is recessed below and laterally spaced from the emitter by an insulator layer (118), formed on the emitter sidewall. Transistor action is confined to the small emitter within the intrinsic base, the latter being contiguous with the extrinsic base. The base is contacted by means of a conductive self-aligned silicide (122), formed on the extrinsic base. In a second embodiment, the emitter is of a desired shape with a correspondingly shaped contacting sidewall and pad integral structure. In all embodiments, electrical contact to emitter is established at a distance laterally away from the transistor action area. A novel process of forming vertical (e.g. NPN) bipolar device in which starting with a substrate having an N type epitaxial collector region, a horizontal layer composed of oxide-polysilicon dual layer with a substantially vertical surface is formed. P type intrinsic base precursor is formed in a surface portion of the collector. A submicron-wide sidewall of N doped polysilcon is established on the sidewall. By RIE, a surface portion of the exposed intrinsic base is removed to recess the would-be extrinsic base. An oxide insulator is formed on the sidewall by thermal oxidation and RIE, while simulta- neously driving dopant from the sidewall into the intrinsic base thereunder, thereby forming the emitter with self-aligned polysilicon sidewall contact and delineating the intrinsic base. Extrin-sic base is implanted into the exposed recessed intrinsic base. A self-aligned silicide layer is formed on the extrinsic base as also on the horizon- tal polysilicon layer linked with the sidewall.

公开(公告)号：AU601575B2

公开(公告)日：1990-09-13

申请号：AU1566788

申请日：1988-05-06

Applicant: IBM

Inventor： MONKOWSKI MICHAEL DANIEL ,  SHEPARD JOSEPH FRANCIS

IPC: H01L29/73 ,  H01L21/331 ,  H01L21/60 ,  H01L29/417 ,  H01L29/423 ,  H01L29/732 ,  H01L29/72

Abstract: A novel vertical bipolar device endowed with a lithography-independent tightly controlled sub-micron-wide emitter. In one embodiment, the emitter (114),is contacted by a self-aligned conductive sidewall (112), linked up to a horizontal conductive link (102). The extrinsic base (116, 120), embedded within the collector (14), is recessed below and laterally spaced from the emitter by an insulator layer (118), formed on the emitter sidewall. Transistor action is confined to the small emitter within the intrinsic base, the latter being contiguous with the extrinsic base. The base is contacted by means of a conductive self-aligned silicide (122), formed on the extrinsic base. In a second embodiment, the emitter is of a desired shape with a correspondingly shaped contacting sidewall and pad integral structure. In all embodiments, electrical contact to emitter is established at a distance laterally away from the transistor action area. A novel process of forming vertical (e.g. NPN) bipolar device in which starting with a substrate having an N type epitaxial collector region, a horizontal layer composed of oxide-polysilicon dual layer with a substantially vertical surface is formed. P type intrinsic base precursor is formed in a surface portion of the collector. A submicron-wide sidewall of N doped polysilcon is established on the sidewall. By RIE, a surface portion of the exposed intrinsic base is removed to recess the would-be extrinsic base. An oxide insulator is formed on the sidewall by thermal oxidation and RIE, while simulta- neously driving dopant from the sidewall into the intrinsic base thereunder, thereby forming the emitter with self-aligned polysilicon sidewall contact and delineating the intrinsic base. Extrin-sic base is implanted into the exposed recessed intrinsic base. A self-aligned silicide layer is formed on the extrinsic base as also on the horizon- tal polysilicon layer linked with the sidewall.

公开(公告)号：BR8801815A

公开(公告)日：1988-11-29

申请号：BR8801815

申请日：1988-04-15

Applicant: IBM

Inventor： MONKOWSKI MICHAEL DANIEL ,  SHEPARD JOSEPH FRANCIS

IPC: H01L29/73 ,  H01L21/331 ,  H01L21/60 ,  H01L29/417 ,  H01L29/423 ,  H01L29/732 ,  H01L29/70

Abstract: A novel vertical bipolar device endowed with a lithography-independent tightly controlled sub-micron-wide emitter. In one embodiment, the emitter (114),is contacted by a self-aligned conductive sidewall (112), linked up to a horizontal conductive link (102). The extrinsic base (116, 120), embedded within the collector (14), is recessed below and laterally spaced from the emitter by an insulator layer (118), formed on the emitter sidewall. Transistor action is confined to the small emitter within the intrinsic base, the latter being contiguous with the extrinsic base. The base is contacted by means of a conductive self-aligned silicide (122), formed on the extrinsic base. In a second embodiment, the emitter is of a desired shape with a correspondingly shaped contacting sidewall and pad integral structure. In all embodiments, electrical contact to emitter is established at a distance laterally away from the transistor action area. A novel process of forming vertical (e.g. NPN) bipolar device in which starting with a substrate having an N type epitaxial collector region, a horizontal layer composed of oxide-polysilicon dual layer with a substantially vertical surface is formed. P type intrinsic base precursor is formed in a surface portion of the collector. A submicron-wide sidewall of N doped polysilcon is established on the sidewall. By RIE, a surface portion of the exposed intrinsic base is removed to recess the would-be extrinsic base. An oxide insulator is formed on the sidewall by thermal oxidation and RIE, while simulta- neously driving dopant from the sidewall into the intrinsic base thereunder, thereby forming the emitter with self-aligned polysilicon sidewall contact and delineating the intrinsic base. Extrin-sic base is implanted into the exposed recessed intrinsic base. A self-aligned silicide layer is formed on the extrinsic base as also on the horizon- tal polysilicon layer linked with the sidewall.

公开(公告)号：AU1566788A

公开(公告)日：1988-11-17

申请号：AU1566788

申请日：1988-05-06

Applicant: IBM

Inventor： MONKOWSKI MICHAEL DANIEL ,  SHEPARD JOSEPH FRANCIS

IPC: H01L29/73 ,  H01L21/331 ,  H01L21/60 ,  H01L29/417 ,  H01L29/423 ,  H01L29/732 ,  H01L29/72

Abstract: A novel vertical bipolar device endowed with a lithography-independent tightly controlled sub-micron-wide emitter. In one embodiment, the emitter (114),is contacted by a self-aligned conductive sidewall (112), linked up to a horizontal conductive link (102). The extrinsic base (116, 120), embedded within the collector (14), is recessed below and laterally spaced from the emitter by an insulator layer (118), formed on the emitter sidewall. Transistor action is confined to the small emitter within the intrinsic base, the latter being contiguous with the extrinsic base. The base is contacted by means of a conductive self-aligned silicide (122), formed on the extrinsic base. In a second embodiment, the emitter is of a desired shape with a correspondingly shaped contacting sidewall and pad integral structure. In all embodiments, electrical contact to emitter is established at a distance laterally away from the transistor action area. A novel process of forming vertical (e.g. NPN) bipolar device in which starting with a substrate having an N type epitaxial collector region, a horizontal layer composed of oxide-polysilicon dual layer with a substantially vertical surface is formed. P type intrinsic base precursor is formed in a surface portion of the collector. A submicron-wide sidewall of N doped polysilcon is established on the sidewall. By RIE, a surface portion of the exposed intrinsic base is removed to recess the would-be extrinsic base. An oxide insulator is formed on the sidewall by thermal oxidation and RIE, while simulta- neously driving dopant from the sidewall into the intrinsic base thereunder, thereby forming the emitter with self-aligned polysilicon sidewall contact and delineating the intrinsic base. Extrin-sic base is implanted into the exposed recessed intrinsic base. A self-aligned silicide layer is formed on the extrinsic base as also on the horizon- tal polysilicon layer linked with the sidewall.