公开(公告)号：CA2066001A1

公开(公告)日：1992-12-07

申请号：CA2066001

申请日：1992-04-14

Applicant: IBM

Inventor： KEENER DON S ,  MOORE GREGORY J

IPC: G06F3/06 ,  G06F13/16 ,  G06F13/36 ,  G06F13/40 ,  G06F13/42 ,  G06F13/12

Abstract: This invention relates to computer systems, and more particularly to a personal computer using a small computer systems interface (SCSI) controller coupled directly to the local processor bus for controlling data transfer with storage memory devices such as fixed or removable media electromagnetic storage devices. The storage controller in accordance with this invention has internal volatile memory for transitory storage of data being communicated to coupled volatile memory. It further has control drivers interposed between the internal volatile memory and external volatile memory for controlling communication of data to the external volatile memory, with an enable driver and an enable receiver enchained between the control drivers and a source of signals controlling data communication. The enchained driver and receiver are connected for issuing a write signal to the external volatile memory prior to enablement of data communication through the control drivers and for sustaining a control signal communicated to the control drivers for enabling data communication until after deactivation of the write signal.

公开(公告)号：CA2099025A1

公开(公告)日：1994-03-18

申请号：CA2099025

申请日：1993-06-23

Applicant: IBM

Inventor： CHIN ARTHUR L ,  ELEAZAR-GARCIA SERAFIN J JR ,  LEE TIMOTHY V ,  KEENER DON S ,  MOORE GREGORY J ,  STINE ERIC S

IPC: G06F13/36 ,  G06F13/362 ,  G06F13/38

Abstract: This invention relates to personal computers, and more particularly to a personal computer using a FIFO registers for data transfer as illustrated by a bus master device in the form of a small computer systems interface (SCSI) controller for controlling data transfer with storage memory devices such as fixed or removable media electromagnetic storage devices. In the practice of this invention, the efficiency of a system having a plurality of bus master devices is enhanced by providing for a programmable threshold fill condition for a FIFO register before arbitration for bus control occurs. Thus the invention provides an approach to maximizing the efficiency of data transfer where FIFO registers are used.

公开(公告)号：CA2065989A1

公开(公告)日：1992-12-08

申请号：CA2065989

申请日：1992-04-14

Applicant: IBM

Inventor： KEENER DON S ,  MOORE GREGORY J ,  VOORHEES RICHARD W

IPC: G06F13/38 ,  G06F13/28 ,  G06F12/00 ,  G06F13/14

Abstract: This invention relates to computers, and more particularly to a storage controller for a computer. The small computer systems interface (SCSI) controller is coupled directly to the local processor bus for controlling data transfer with storage memory devices such as fixed or removable media electromagnetic storage devices. The personal computer 10 system has a high speed local processor data bus 34, at least one logical processor device 32 coupled directly to the local processor bus 34 and capable of signalling through the local processor bus 34 an occurrence of the transfer of blocks of data, and a storage controller 40 coupled directly to the local processor bus 34 for regulating communications between the processor device 32 and storage memory devices 36. The storage controller 40 has a FIFO memory for transitory storage of blocks of data being exchanged with the local processor bus 34 and is capable of signalling through the local processor bus 34 the state of the FIFO memory. The processor device 32 and storage controller 40 cooperate for exchange of blocks of data between the local processor bus 34 and FIFO memory when the FIFO memory has available one of data to be transferred and space for reception of data and for emptying of the FIFO memory through the local processor bus 34 as necessary.

公开(公告)号：BR9201999A

公开(公告)日：1993-02-02

申请号：BR9201999

申请日：1992-05-27

Applicant: IBM

Inventor： KEENER DON S ,  MOORE GREGORY J

IPC: G06F3/06 ,  G06F13/16 ,  G06F13/36 ,  G06F13/40 ,  G06F13/42 ,  G06F13/00

Abstract: This invention relates to computer systems, and more particularly to a personal computer using a small computer systems interface (SCSI) controller coupled directly to the local processor bus for controlling data transfer with storage memory devices such as fixed or removable media electromagnetic storage devices. The storage controller in accordance with this invention has internal volatile memory for transitory storage of data being communicated to coupled volatile memory. It further has control drivers interposed between the internal volatile memory and external volatile memory for controlling communication of data to the external volatile memory, with an enable driver and an enable receiver enchained between the control drivers and a source of signals controlling data communication. The enchained driver and receiver are connected for issuing a write signal to the external volatile memory prior to enablement of data communication through the control drivers and for sustaining a control signal communicated to the control drivers for enabling data communication until after deactivation of the write signal.

公开(公告)号：CA2065991A1

公开(公告)日：1992-12-08

申请号：CA2065991

申请日：1992-04-14

Applicant: IBM

Inventor： KEENER DON S ,  MOORE GREGORY J

IPC: G06F12/02 ,  G06F13/12 ,  G06F13/28 ,  G06F13/36 ,  G06F13/14

Abstract: This invention relates to personal computers, and more particularly to a storage controller for a personal computer. The small computer systems interface (SCSI) controller is coupled directly to the local processor bus for controlling data transfer with storage memory devices such as fixed or removable media electromagnetic storage devices. The personal computer 10 has a high speed local processor data bus 34 and a storage controller 40 coupled directly to the local processor bus for regulating communications between a processor 32 and storage memory devices 36. The storage controller 40 has at least one counter 60 for tracking at least one of address and count data for blocks of data being transferred and capable of signalling through the local processor bus the state of the counter, and a bi-stable device 61 interposed between the local processor bus of data representing an initial state of the counter at the beginning of a transfer of blocks of data and for continuing delivery of initial state data throughout a transfer of blocks of data. The counter and bi-stable device cooperate for permitting one of incrementing and decrementing of the counter during transfer of blocks of data while avoiding changes in counter state data delivered to the local processor bus during transfer of blocks of data.