公开(公告)号：HK1016291A1

公开(公告)日：1999-10-29

申请号：HK99101156

申请日：1999-03-23

Applicant: IBM

Inventor： MORENO JAIME UMBERTO ,  MOUDGILL MAYAN

IPC: G06F9/38 ,  G06F

Abstract: The present invention is an apparatus that maps the memory address space of the computer system into regions, and detects the incorrect execution of a load operation performed earlier than a sequentially preceding (in program order) store operation. The apparatus detects out-of-order load operations, uses a region-based mapping table to keep track of the memory regions accessed by the out-of-order load operations, detects the execution of store operations into regions accessed by out-of-order load operations, and generates a program exception when interference among reordered operations is detected. The invention is applicable to static and dynamic reordering of memory operations.

公开(公告)号：GB2324181A

公开(公告)日：1998-10-14

申请号：GB9803608

申请日：1998-02-21

Applicant: IBM

Inventor： MORENO JAIME UMBERTO ,  MOUDGILL MAYAN

IPC: G06F9/38

Abstract: A computer processing system stores sequences of instructions in memory for execution by a processor unit. An out-of-order load instruction may be created, either statically or dynamically, by moving a load instruction from its original position in a sequence of instructions to an earlier position in said sequence of instructions. The present invention maps the memory address space of the computer system into regions, and detects the incorrect execution of a load operation performed earlier than a sequentially preceding (in program order) store operation. More specifically, the apparatus detects out-of-order load operations, uses a region-based mapping table 330 to keep track of the memory regions accessed by the out-of-order load operations, detects the execution of store operations into regions accessed by out-of-order load operations, and directs the processor to execute a recovery sequence when interference among reordered operations is detected. The invention is applicable to static (Figs 1 and 2) and dynamic (Figs 3-7) reordering of memory operations.

公开(公告)号：GB2324181B

公开(公告)日：2001-11-21

申请号：GB9803608

申请日：1998-02-21

Applicant: IBM

Inventor： MORENO JAIME UMBERTO ,  MOUDGILL MAYAN

IPC: G06F9/38

Abstract: The present invention is an apparatus that maps the memory address space of the computer system into regions, and detects the incorrect execution of a load operation performed earlier than a sequentially preceding (in program order) store operation. The apparatus detects out-of-order load operations, uses a region-based mapping table to keep track of the memory regions accessed by the out-of-order load operations, detects the execution of store operations into regions accessed by out-of-order load operations, and generates a program exception when interference among reordered operations is detected. The invention is applicable to static and dynamic reordering of memory operations.

公开(公告)号：SG71088A1

公开(公告)日：2000-03-21

申请号：SG1998000431

申请日：1998-02-26

Applicant: IBM

Inventor： MORENO JAIME UMBERTO ,  MOUDGILL MAYAN

IPC: G06F9/38 ,  G06F9/445 ,  G06F12/02

Abstract: The present invention is an apparatus that maps the memory address space of the computer system into regions, and detects the incorrect execution of a load operation performed earlier than a sequentially preceding (in program order) store operation. The apparatus detects out-of-order load operations, uses a region-based mapping table to keep track of the memory regions accessed by the out-of-order load operations, detects the execution of store operations into regions accessed by out-of-order load operations, and generates a program exception when interference among reordered operations is detected. The invention is applicable to static and dynamic reordering of memory operations.