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公开(公告)号：GB2509653B
公开(公告)日：2015-12-09
申请号：GB201406775
申请日：2012-10-01
Applicant: IBM
Inventor： BLAINEY ROBERT JAMES , GSCHWIND MICHAEL KARL , MCINNES JAMES LAWRENCE , MUNROE STEVEN JAY , MEISSNER MICHAEL
IPC: G06F9/45
Abstract: A code sequence made up multiple instructions and specifying an offset from a base address is identified in an object file. The offset from the base address corresponds to an offset location in a memory configured for storing an address of a variable or data. The identified code sequence is configured to perform a memory reference function or a memory address computation function. It is determined that the offset location is within a specified distance of the base address and that a replacement of the identified code sequence with a replacement code sequence will not alter program semantics. The identified code sequence in the object file is replaced with the replacement code sequence that includes a no-operation (NOP) instruction or having fewer instructions than the identified code sequence. Linked executable code is generated based on the object file and the linked executable code is emitted.
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公开(公告)号：GB2322209B
公开(公告)日：2001-11-21
申请号：GB9725508
申请日：1997-12-02
Applicant: IBM
Inventor： MUNROE STEVEN JAY , PLAETZER SCOTT ALAN , STOPYRO JAMES WILLIAMS
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公开(公告)号：CA2153442A1
公开(公告)日：1996-03-01
申请号：CA2153442
申请日：1995-07-07
Applicant: IBM
Inventor： MUNROE STEVEN JAY , SIRJANI ABOLFAZL , VOLDAL ERIK EDWARD
Abstract: An object pointer data structure for efficiently combining an object identifier and an object address for use in object-oriented programming systems. An object address is a value that allows a client application or process to conduct high-performance operations on an object in the client's local virtual address space. An object identifier is a value that can be used to uniquely identify an object for the lifetime of that object across some defined domain, such as an entire universe of computer systems. The data structure of this invention defines an object pointer that is larger than the object address but smaller than the combination of the object identifier and object address. The truncated object pointer structure preserves all information from both object address and object identifier by forcing a portion of the local object address in each address space to be equal to a portion of the invariant object identifier. A local pointer mapping table may be used for efficiency in assigning local addresses to restored objects in each process.
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公开(公告)号：GB2509438B
公开(公告)日：2015-09-09
申请号：GB201405930
申请日：2012-09-14
Applicant: IBM
Abstract: Generating decode time instruction optimization (DTIO) object code that enables a DTIO enabled processor to optimize execution of DTIO instructions. A code sequence configured to facilitate DTIO in a DTIO enabled processor is identified by a computer. The code sequence includes an internal representation (IR) of a first instruction and an IR of a second instruction. The second instruction is dependent on the first instruction. A schedule associated with at least one of the IR of the first instruction and the IR of the second instruction is modified. The modifying includes generating a modified schedule that is configured to place the first instruction next to the second instruction. An object file is generated based on the modified schedule. The object file includes the first instruction placed next to the second instruction. The object file is emitted.
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公开(公告)号：GB2509438A
公开(公告)日：2014-07-02
申请号：GB201405930
申请日：2012-09-14
Applicant: IBM
Abstract: Compiling code for an enhanced application binary interface (ABI) including identifying, by a computer, a code sequence configured to perform a variable address reference table function including an access to a variable at an offset outside of a location in a variable address reference table. The code sequence includes an internal representation (IR) of a first instruction and an IR of a second instruction. The second instruction is dependent on the first instruction. A scheduler cost function associated with at least one of the IR of the first instruction and the IR of the second instruction is modified. The modifying includes generating a modified scheduler cost function that is configured to place the first instruction next to the second instruction. An object file is generated responsive to the modified scheduler cost function. The object file includes the first instruction placed next to the second instruction. The object file is emitted.
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Patent Agency Ranking
公开(公告)号：DE69519006D1
公开(公告)日：2000-11-09
申请号：DE69519006
申请日：1995-07-24
Applicant: IBM
Inventor： MUNROE STEVEN JAY , SIRJANI ABOLFALZ , VOLDAL ERIK EDWARD
Abstract: An object pointer data structure for efficiently combining an object identifier and an object address for use in object-oriented programming systems. An object address is a value that allows a client application or process to conduct high-performance operations on an object in the client's local virtual address space. An object identifier is a value that can be used to uniquely identify an object for the lifetime of that object across some defined domain, such as an entire universe of computer systems. The data structure of this invention defines an object pointer that is larger than the object address but smaller than the combination of the object identifier and object address. The truncated object pointer structure preserves all information from both object address and object identifier by forcing a portion of the local object address in each address space to be equal to a portion of the invariant object identifier. A local pointer mapping table may be used for efficiency in assigning local addresses to restored objects in each process.
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公开(公告)号：GB2509653A8
公开(公告)日：2015-11-11
申请号：GB201406775
申请日：2012-10-01
Applicant: IBM
Inventor： BLAINEY ROBERT JAMES , GSCHWIND MICHAEL KARL , MCINNES JAMES LAWRENCE , MUNROE STEVEN JAY , MEISSNER MICHAEL
IPC: G06F9/45
Abstract: A code sequence made up multiple instructions and specifying an offset from a base address is identified in an object file. The offset from the base address corresponds to an offset location in a memory configured for storing an address of a variable or data. The identified code sequence is configured to perform a memory reference function or a memory address computation function. It is determined that the offset location is within a specified distance of the base address and that a replacement of the identified code sequence with a replacement code sequence will not alter program semantics. The identified code sequence in the object file is replaced with the replacement code sequence that includes a no-operation (NOP) instruction or having fewer instructions than the identified code sequence. Linked executable code is generated based on the object file and the linked executable code is emitted.
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公开(公告)号：GB2525523A
公开(公告)日：2015-10-28
申请号：GB201513325
申请日：2012-09-14
Applicant: IBM
IPC: G06F9/45
Abstract: Compiling code for an enhanced application binary interface (ABI) including identifying 602 a code sequence configured to perform a variable address reference table, such as a table of contents (TOC) function including an access to a variable at an offset outside of a location in a variable address reference table. The code sequence includes an internal representation (IR) of an instruction that will be expanded to multiple instructions that are adjacent to each other in the object file and corresponds to a reduced latency of IOP sequence when executed on a decode time instruction optimization (DTIO) enabled microprocessor. A modified scheduler cost function which is configured to recognize that the internal representation corresponds to the reduced latency is used. An object file is generated 606 responsive to the modified scheduler cost function to include expanding the internal representation (IR) as multiple adjacent instructions. The object file is emitted 608 for linking by a linker.
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公开(公告)号：GB2509653A
公开(公告)日：2014-07-09
申请号：GB201406775
申请日：2012-10-01
Applicant: IBM
Inventor： BLAINEY ROBERT JAMES , GSCHWIND MICHAEL KARL , MCINNES JAMES LAWRENCE , MUNROE STEVEN JAY , MEISSNER MICHAEL
IPC: G06F9/45
Abstract: A code sequence made up multiple instructions and specifying an offset from a base address is identified in an object file. The offset from the base address corresponds to an offset location in a memory configured for storing an address of a variable or data. The identified code sequence is configured to perform a memory reference function or a memory address computation function. It is determined that the offset location is within a specified distance of the base address and that a replacement of the identified code sequence with a replacement code sequence will not alter program semantics. The identified code sequence in the object file is replaced with the replacement code sequence that includes a no-operation (NOP) instruction or having fewer instructions than the identified code sequence. Linked executable code is generated based on the object file and the linked executable code is emitted.
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10.发明专利
公开(公告)号：GB2322209A
公开(公告)日：1998-08-19
申请号：GB9725508
申请日：1997-12-02
Applicant: IBM
Inventor： MUNROE STEVEN JAY , PLAETZER SCOTT ALAN , STOPYRO JAMES WILLIAMS
Abstract: A multi-tasking computer operating system allocates a respective virtual address space to each task. A portion of virtual address space is reserved as a shared address space (SAS) region 510, the SAS region occupying the same range of virtual addresses in the virtual address space of each task. Outside the SAS region the mapping of entities in virtual memory is handled in the same way as in in a conventional multiple virtual address space architecture. Certain classes of data intended for sharing among multiple tasks are assigned unique and persistent addresses in the range of the shared address space region. Preferably, certain facilities are added to a conventional base operating system to support the SAS region and associated function. These include a join facility for initiating a task to the SAS region, an attach facility for attaching blocks of memory within the SAS region, and a paging facility for retrieving a page within the SAS region from storage. In this manner, it is possible for a multi-tasking multiple virtual address space computer system to assume the advantages of a single-level store computer system when performing certain tasks.
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