METHOD FOR ADDING DECOUPLING CAPACITANCE DURING DESIGN OF INTEGRATED CIRCUIT

    公开(公告)号:JP2002288253A

    公开(公告)日:2002-10-04

    申请号:JP2002004163

    申请日:2002-01-11

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide a method for adding decoupling capacitance which is installed within an integrated circuit between two-dimensional design stages of the integrated circuit. SOLUTION: In the method for adding decoupling capacitance in the integrated circuit design, a step for forming a two-dimensional plan for the integrated circuit provided with relative positions of a multiple number of functional units, a step for superposing a power grid over the two-dimensional plan, a step for dividing the two dimensional plan and the power grid into a multiple number of ranges and for determining support decoupling capacitance value necessary for supporting the voltage of the power grid for each region, a step for determining a specific capacitance value, a step to determine a necessary decoupling capacitance value, based on the support decoupling capacitance value and the specific capacitance value, a step for determining a decoupling condenser region for the necessary decoupling condenser capacitance value and a step for correcting a circuit area within the region, based on the decoupling condenser region are contained.

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