公开(公告)号：US6423603B2

公开(公告)日：2002-07-23

申请号：US92165601

申请日：2001-08-06

Applicant: IBM

Inventor： GROVES ROBERT A ,  JADUS DALE K ,  NGUYEN-NGOC DOMINIQUE L ,  WALTER KEITH M

IPC: H01L21/331 ,  H01L21/768 ,  H01L21/8222 ,  H01L27/082 ,  H01L29/06 ,  H01L29/73 ,  H01L29/732

CPC classification number: H01L29/73 ,  H01L27/0823 ,  H01L29/0692

Abstract: A transistor array including a plurality of transistors. Each transistor includes an emitter. An emitter region contact overlies each emitter region. At least one base region underlies each emitter region and is common to a plurality of transistors in the array. At least one base contact overlies the at least one base region and is associated with each transistor. A plurality of the base contacts are common to at least two transistors in the array. At least one collector reach through is associated with each transistor. A collector reach through contact overlies each collector reach through. A buried layer subcollector region of electrically conducting material electrically connects the collector reach through region to the collector pedestal region of each transistor.

Abstract translation: 一种包括多个晶体管的晶体管阵列。 每个晶体管包括发射极。 发射极区域接触覆盖每个发射极区域。 至少一个基极区域位于每个发射极区域的下面，并且对阵列中的多个晶体管是共同的。 至少一个基极接触覆盖至少一个基极区域并与每个晶体管相关联。 多个基极触点对于阵列中的至少两个晶体管是共同的。 至少一个集电极通过与每个晶体管相关联。 通过接触覆盖的收集器覆盖每个收集器到达。 导电材料的埋层子集电极区域将集电极到达区域电连接到每个晶体管的集电极基座区域。