公开(公告)号：DE69622301T2

公开(公告)日：2003-02-20

申请号：DE69622301

申请日：1996-02-21

Applicant: IBM

Inventor： MALIK NADEEM ,  O'KRAFKA BRIAN ,  SAHA AVIJIT ,  SALAMIAN SHAHRAM

IPC: G06F15/16 ,  G06F11/28 ,  G06F12/08 ,  G06F15/177 ,  G06F11/00 ,  G06F9/46

Abstract: A method and system are disclosed for verifying consistency of an instruction execution order of a multiprocessor data processing system 10 with a specified memory consistency model. Each processor 12 within the multiprocessor data processing system executes instructions from an associated one of a number of instruction streams 60, 62, which include instructions that store a number of unique values from multiple processors to a single selected address within memory. One of the unique values is loaded from the selected address to a particular processor within the data processing system. A set of valid values which may be returned by the loading step is determined according to the specified memory consistency model. By comparing the unique value with members of the set of valid values, the instruction execution order of the multiprocessor data processing system is verified. Utilizing the unique value which was returned by the load instruction, the set of valid values may then be updated.

公开(公告)号：DE69622301D1

公开(公告)日：2002-08-22

申请号：DE69622301

申请日：1996-02-21

Applicant: IBM

Inventor： MALIK NADEEM ,  O'KRAFKA BRIAN ,  SAHA AVIJIT ,  SALAMIAN SHAHRAM

IPC: G06F15/16 ,  G06F11/28 ,  G06F12/08 ,  G06F15/177 ,  G06F11/00 ,  G06F9/46

Abstract: A method and system are disclosed for verifying consistency of an instruction execution order of a multiprocessor data processing system 10 with a specified memory consistency model. Each processor 12 within the multiprocessor data processing system executes instructions from an associated one of a number of instruction streams 60, 62, which include instructions that store a number of unique values from multiple processors to a single selected address within memory. One of the unique values is loaded from the selected address to a particular processor within the data processing system. A set of valid values which may be returned by the loading step is determined according to the specified memory consistency model. By comparing the unique value with members of the set of valid values, the instruction execution order of the multiprocessor data processing system is verified. Utilizing the unique value which was returned by the load instruction, the set of valid values may then be updated.