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公开(公告)号:JPH08305629A
公开(公告)日:1996-11-22
申请号:JP10105995
申请日:1995-04-25
Applicant: IBM
Inventor: FUKUSHIMA TOSHIAKI , OISHI SHINJI , NOMURA MASAHIKO
Abstract: PURPOSE: To dynamically compensate the signal waveform or timing of each output signal line (RAS, CAS, WE, MA) of a memory controller even when many kinds of extended memories (DIMM card) whose storage capacities or memory chip arrays are different are mounted. CONSTITUTION: This is a memory access controller used for a computer system on which an extended memory 17 can be mounted in addition to a standard memory 13, which controls access to the memories 13 and 17 by more than one signal lines. This memory access controller is provided with an identifying means which reads the identification data of the mounted extended memory 17, discriminating means which discriminates the optimal output current value of each signal line based on the identification data, and means which adjusts the output currents of each signal line based on the discriminated result.
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公开(公告)号:JP2004362027A
公开(公告)日:2004-12-24
申请号:JP2003156367
申请日:2003-06-02
Applicant: Internatl Business Mach Corp
, インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation Inventor: OISHI SHINJI , YOSHIYAMA NORITOSHI , TANAKA AKIYOSHI
CPC classification number: G06F1/3203
Abstract: PROBLEM TO BE SOLVED: To provide an information processing device that prevents the transition of a system operating state by a user's erroneous input. SOLUTION: The information processing device which transits a system operating state according to a user's direction input comprises a request signal acquisition part for acquiring a transition request signal requesting the transition of a system operating state, an instruction signal generation part for generating a transition instruction signal for transiting the system operating state according to the transition request signal acquired by the request signal acquisition part, an operation control part for transiting the system operating state according to the transition instruction signal generated by the instruction signal generation part, and an instruction signal generation control part for prohibiting the instruction signal generation part from generating a transition instruction signal if the request signal acquisition part reacquires the same transition request signal as the transition request signal until a time for transition processing in the normal transition processing of the system operating state by the operation control part elapses. COPYRIGHT: (C)2005,JPO&NCIPI
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