公开(公告)号：DE2417149A1

公开(公告)日：1975-01-02

申请号：DE2417149

申请日：1974-04-09

Applicant: IBM

Inventor： PADDOCK RICHARD CHARLES

IPC: H03K23/00 ,  H03K23/44 ,  H03K23/24

公开(公告)号：DE2524046A1

公开(公告)日：1976-01-15

申请号：DE2524046

申请日：1975-05-30

Applicant: IBM

Inventor： HOLMES JUN ARTHUR WILBERT ,  OMAN PRICE WARD ,  PADDOCK RICHARD CHARLES ,  PRICE DONALD WALTER

IPC: G06F9/46 ,  G06F9/38 ,  G06F15/16 ,  G06F15/177 ,  G06F15/80 ,  G06F9/10 ,  G06F13/06

Abstract: A processor including a plurality of synchronized subprocessors, each implemented on an integrated circuit substrate and each having an instruction register and instruction executing circuits for independently executing a portion of the functions required by an instruction being simultaneously executed by each subprocessor. Execution is initiated and synchronized by simultaneously loading the same instruction into each subprocessor.

公开(公告)号：DE2407011A1

公开(公告)日：1974-09-19

申请号：DE2407011

申请日：1974-02-14

Applicant: IBM

Inventor： HOLMES JUN ARTHUR WILBERT ,  LONG GERALD BERNARD ,  PADDOCK RICHARD CHARLES ,  PI SHING CHOU ,  PRICE DONALD WALTER

IPC: G11C17/00 ,  G06F9/26 ,  G11C11/413 ,  G11C17/12